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(34)
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Computing Accurate Performance Bounds for Best Effort Networks-on-Chip.
Dara Rahmati
,
Srinivasan Murali
,
Luca Benini
,
Federico Angiolini
,
Giovanni De Micheli
, and
Hamid Sarbazi-Azad
.
IEEE Trans. Computers
62(3):452-467
(
2013
)
Dara Rahmati
,
Srinivasan Murali
,
Luca Benini
,
Federico Angiolini
,
Giovanni De Micheli
, and
Hamid Sarbazi-Azad
.
IEEE Trans. Computers
62(3):452-467
(
2013
)
3 months and 10 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Simultaneous memory and bus partitioning for SoC architectures.
Suresh Srinivasan
,
Federico Angiolini
,
Martino Ruggiero
,
Luca Benini
, and
Narayanan Vijaykrishnan
.
SoCC,
page 125-128.
IEEE,
(
2005
)
Suresh Srinivasan
,
Federico Angiolini
,
Martino Ruggiero
,
Luca Benini
, and
Narayanan Vijaykrishnan
.
SoCC,
page 125-128.
IEEE,
(
2005
)
4 months and 16 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Design Issues and Considerations for Low-Cost 3-D TSV IC Technology.
Geert Van der Plas
,
Paresh Limaye
,
Igor Loi
,
Abdelkarim Mercha
,
Herman Oprins
,
Cristina Torregiani
,
Steven Thijs
,
Dimitri Linten
,
Michele Stucchi
,
Guruprasad Katti
,
Dimitrios Velenis
,
Vladimir Cherman
,
Bart Vandevelde
,
Veerle Simons
,
Ingrid De Wolf
,
Riet Labie
,
Dan Perry
,
Stephane Bronckers
,
Nikolaos Minas
,
Miro Cupac
,
Wouter Ruythooren
,
Jan Van Olmen
,
Alain Phommahaxay
,
Muriel de Potter de ten Broeck
,
Ann Opdebeeck
,
Michal Rakowski
,
Bart De Wachter
,
Morin Dehan
,
Marc Nelis
,
Rahul Agarwal
,
Antonio Pullini
,
Federico Angiolini
,
Luca Benini
,
Wim Dehaene
,
Youssef Travaly
,
Eric Beyne
, and
Paul Marchal
.
J. Solid-State Circuits
46(1):293-307
(
2011
)
Geert Van der Plas
,
Paresh Limaye
,
Igor Loi
,
Abdelkarim Mercha
,
Herman Oprins
,
Cristina Torregiani
,
Steven Thijs
,
Dimitri Linten
,
Michele Stucchi
,
Guruprasad Katti
,
Dimitrios Velenis
,
Vladimir Cherman
,
Bart Vandevelde
,
Veerle Simons
,
Ingrid De Wolf
,
Riet Labie
,
Dan Perry
,
Stephane Bronckers
,
Nikolaos Minas
,
Miro Cupac
,
Wouter Ruythooren
,
Jan Van Olmen
,
Alain Phommahaxay
,
Muriel de Potter de ten Broeck
,
Ann Opdebeeck
,
Michal Rakowski
,
Bart De Wachter
,
Morin Dehan
,
Marc Nelis
,
Rahul Agarwal
,
Antonio Pullini
,
Federico Angiolini
,
Luca Benini
,
Wim Dehaene
,
Youssef Travaly
,
Eric Beyne
, and
Paul Marchal
.
J. Solid-State Circuits
46(1):293-307
(
2011
)
a year and 2 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
A floorplan-aware interactive tool flow for NoC design and synthesis.
Mohammad Reza Kakoee
,
Federico Angiolini
,
Srinivasan Murali
,
Antonio Pullini
,
Ciprian Seiculescu
, and
Luca Benini
.
SoCC,
page 379-382.
IEEE,
(
2009
)
Mohammad Reza Kakoee
,
Federico Angiolini
,
Srinivasan Murali
,
Antonio Pullini
,
Ciprian Seiculescu
, and
Luca Benini
.
SoCC,
page 379-382.
IEEE,
(
2009
)
a year and 8 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Area and Power Modeling for Networks-on-Chip with Layout Awareness.
Paolo Meloni
,
Igor Loi
,
Federico Angiolini
,
Salvatore Carta
,
Massimo Barbaro
,
Luigi Raffo
, and
Luca Benini
.
VLSI Design
(
2007
)
Paolo Meloni
,
Igor Loi
,
Federico Angiolini
,
Salvatore Carta
,
Massimo Barbaro
,
Luigi Raffo
, and
Luca Benini
.
VLSI Design
(
2007
)
a year and 10 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Exploring architectural solutions for energy optimisations in bus-based system-on-chip.
Suresh Srinivasan
,
Lin Li
,
Martino Ruggiero
,
Federico Angiolini
,
Narayanan Vijaykrishnan
, and
Luca Benini
.
IET Computers & Digital Techniques
2(5):347-354
(
2008
)
Suresh Srinivasan
,
Lin Li
,
Martino Ruggiero
,
Federico Angiolini
,
Narayanan Vijaykrishnan
, and
Luca Benini
.
IET Computers & Digital Techniques
2(5):347-354
(
2008
)
a year and 11 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip.
Igor Loi
,
Federico Angiolini
,
Shinobu Fujita
,
Subhasish Mitra
, and
Luca Benini
.
IEEE Trans. on CAD of Integrated Circuits and Systems
30(1):124-134
(
2011
)
Igor Loi
,
Federico Angiolini
,
Shinobu Fujita
,
Subhasish Mitra
, and
Luca Benini
.
IEEE Trans. on CAD of Integrated Circuits and Systems
30(1):124-134
(
2011
)
2 years and 2 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Exploring programming model-driven QoS support for NoC-based platforms.
Jaume Joven
,
Andrea Marongiu
,
Federico Angiolini
,
Luca Benini
, and
Giovanni De Micheli
.
CODES+ISSS,
page 65-74.
ACM,
(
2010
)
Jaume Joven
,
Andrea Marongiu
,
Federico Angiolini
,
Luca Benini
, and
Giovanni De Micheli
.
CODES+ISSS,
page 65-74.
ACM,
(
2010
)
2 years and 5 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
A method for calculating hard QoS guarantees for Networks-on-Chip.
Dara Rahmati
,
Srinivasan Murali
,
Luca Benini
,
Federico Angiolini
,
Giovanni De Micheli
, and
Hamid Sarbazi-Azad
.
ICCAD,
page 579-586.
IEEE,
(
2009
)
Dara Rahmati
,
Srinivasan Murali
,
Luca Benini
,
Federico Angiolini
,
Giovanni De Micheli
, and
Hamid Sarbazi-Azad
.
ICCAD,
page 579-586.
IEEE,
(
2009
)
2 years and 9 months ago
by
dblp
2
dblp
dblp
URL
DOI
TeX
Networks on Chips: from research to products.
Giovanni De Micheli
,
Ciprian Seiculescu
,
Srinivasan Murali
,
Luca Benini
,
Federico Angiolini
, and
Antonio Pullini
.
DAC,
page 300-305.
ACM,
(
2010
)
Giovanni De Micheli
,
Ciprian Seiculescu
,
Srinivasan Murali
,
Luca Benini
,
Federico Angiolini
, and
Antonio Pullini
.
DAC,
page 300-305.
ACM,
(
2010
)
2 years and 9 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Automated Pathfinding tool chain for 3D-stacked integrated circuits: Practical case study.
Dragomir Milojevic
,
Trevor Carlson
,
Kris Croes
,
Riko Radojcic
,
Diana F. Ragett
,
Dirk Seynhaeve
,
Federico Angiolini
,
Geert Van der Plas
, and
Paul Marchal
.
3DIC,
page 1-6.
IEEE,
(
2009
)
Dragomir Milojevic
,
Trevor Carlson
,
Kris Croes
,
Riko Radojcic
,
Diana F. Ragett
,
Dirk Seynhaeve
,
Federico Angiolini
,
Geert Van der Plas
, and
Paul Marchal
.
3DIC,
page 1-6.
IEEE,
(
2009
)
2 years and 10 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Synthesis of low-overhead configurable source routing tables for network interfaces.
Igor Loi
,
Federico Angiolini
, and
Luca Benini
.
DATE,
page 262-267.
IEEE,
(
2009
)
Igor Loi
,
Federico Angiolini
, and
Luca Benini
.
DATE,
page 262-267.
IEEE,
(
2009
)
3 years and 8 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Developing Mesochronous Synchronizers to Enable 3D NoCs.
Igor Loi
,
Federico Angiolini
, and
Luca Benini
.
DATE,
page 1414-1419.
IEEE,
(
2008
)
Igor Loi
,
Federico Angiolini
, and
Luca Benini
.
DATE,
page 1414-1419.
IEEE,
(
2008
)
4 years and 10 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Network-on-Chip design and synthesis outlook.
David Atienza
,
Federico Angiolini
,
Srinivasan Murali
,
Antonio Pullini
,
Luca Benini
, and
Giovanni De Micheli
.
Integration
41(3):340-359
(
2008
)
David Atienza
,
Federico Angiolini
,
Srinivasan Murali
,
Antonio Pullini
,
Luca Benini
, and
Giovanni De Micheli
.
Integration
41(3):340-359
(
2008
)
4 years and 11 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Timing-Error-Tolerant Network-on-Chip Design Methodology.
Rutuparna Tamhankar
,
Srinivasan Murali
,
Stergios Stergiou
,
Antonio Pullini
,
Federico Angiolini
,
Luca Benini
, and
Giovanni De Micheli
.
IEEE Trans. on CAD of Integrated Circuits and Systems
26(7):1297-1310
(
2007
)
Rutuparna Tamhankar
,
Srinivasan Murali
,
Stergios Stergiou
,
Antonio Pullini
,
Federico Angiolini
,
Luca Benini
, and
Giovanni De Micheli
.
IEEE Trans. on CAD of Integrated Circuits and Systems
26(7):1297-1310
(
2007
)
5 years and 2 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs.
Federico Angiolini
,
Paolo Meloni
,
Salvatore Carta
,
Luigi Raffo
, and
Luca Benini
.
IEEE Trans. on CAD of Integrated Circuits and Systems
26(3):421-434
(
2007
)
Federico Angiolini
,
Paolo Meloni
,
Salvatore Carta
,
Luigi Raffo
, and
Luca Benini
.
IEEE Trans. on CAD of Integrated Circuits and Systems
26(3):421-434
(
2007
)
5 years and 2 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
A Reactive and Cycle-True IP Emulator for MPSoC Exploration.
Shankar Mahadevan
,
Federico Angiolini
,
Jens Sparsø
,
Luca Benini
, and
Jan Madsen
.
IEEE Trans. on CAD of Integrated Circuits and Systems
27(1):109-122
(
2008
)
Shankar Mahadevan
,
Federico Angiolini
,
Jens Sparsø
,
Luca Benini
, and
Jan Madsen
.
IEEE Trans. on CAD of Integrated Circuits and Systems
27(1):109-122
(
2008
)
5 years and 2 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Reliability Support for On-Chip Memories Using Networks-on-Chip.
Federico Angiolini
,
David Atienza
,
Srinivasan Murali
,
Luca Benini
, and
Giovanni De Micheli
.
ICCD,
IEEE,
(
2006
)
Federico Angiolini
,
David Atienza
,
Srinivasan Murali
,
Luca Benini
, and
Giovanni De Micheli
.
ICCD,
IEEE,
(
2006
)
5 years and 4 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Bringing NoCs to 65 nm.
Antonio Pullini
,
Federico Angiolini
,
Srinivasan Murali
,
David Atienza
,
Giovanni De Micheli
, and
Luca Benini
.
IEEE Micro
27(5):75-85
(
2007
)
Antonio Pullini
,
Federico Angiolini
,
Srinivasan Murali
,
David Atienza
,
Giovanni De Micheli
, and
Luca Benini
.
IEEE Micro
27(5):75-85
(
2007
)
5 years and 7 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
A Traffic Injection Methodology with Support for System-Level Synchronization.
Shankar Mahadevan
,
Federico Angiolini
,
Jens Sparsø
,
Luca Benini
, and
Jan Madsen
.
VLSI-SoC,
volume 240 of IFIP,
page 145-161.
Springer,
(
2005
)
Shankar Mahadevan
,
Federico Angiolini
,
Jens Sparsø
,
Luca Benini
, and
Jan Madsen
.
VLSI-SoC,
volume 240 of IFIP,
page 145-161.
Springer,
(
2005
)
5 years and 7 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
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of the University of Würzburg, and the
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