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(3)

• Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles.
  Nabil Badereddine and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel and Christian Landrault VLSI-SoC 267-281 (2005)
  to dblp by dblp on 2007-11-07 00:00:00
  | URL | BibTeX  
• Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing.
  Nabil Badereddine and Patrick Girard and Serge Pravossoudovitch and Christian Landrault and Arnaud Virazel and Hans-Joachim Wunderlich VLSI-SoC 403-408 (2006)
  to dblp by dblp on 2007-07-19 00:00:00
  | URL | BibTeX  
• Controlling Peak Power Consumption During Scan Testing: Power-Aware DfT and Test Set Perspectives.
  Nabil Badereddine and Patrick Girard and Arnaud Virazel and Serge Pravossoudovitch and Christian Landrault PATMOS 540-549 (2005)
  to dblp by dblp on 2005-09-01 00:00:00
  | URL | BibTeX