BibSonomy ::  author :: Buyuktosunoglu ::

bookmarks

publications

• ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs.
  Carlos Luque and Miquel Moretó and Francisco J. Cazorla and Roberto Gioiosa and Alper Buyuktosunoglu and Mateo Valero PACT, page 203-213. IEEE Computer Society, (2009)
  to dblp by dblp on Jan 19, 2010, 12:00 AM
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• Dynamic power gating with quality guarantees.
  Anita Lungu and Pradip Bose and Alper Buyuktosunoglu and Daniel J. Sorin ISLPED, page 377-382. ACM, (2009)
  to dblp by dblp on Nov 20, 2009, 12:00 AM
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• Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors
  Hans Jacobson and Pradip Bose and Zhigang Hu and Alper Buyuktosunoglu and Victor Zyuban and Rick Eickemeyer and Lee Eisen and John Griswell and Doug Logan and Balaram Sinharoy and Joel Tendler HPCA '05: Proceedings of the 11th International Symposium on High-Performance Computer Architecture, page 238--242. Washington, DC, USA, IEEE Computer Society, (2005)
  to Clock-Gating PhD_Background_Mechanisms PhD_Biblio by derkling on Aug 31, 2009, 3:54 PM
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• Long-Term Workload Phases: Duration Predictions and Applications to DVFS
  Canturk Isci and Alper Buyuktosunoglu and Margaret Martonosi IEEE Micro25(5):39-51(2005)
  to DVFS PhD_Background_Mechanisms PhD_Biblio by derkling on Aug 27, 2009, 3:15 PM
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• An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget
  Canturk Isci and Alper Buyuktosunoglu and Chen-Yong Cher and Pradip Bose and Margaret Martonosi MICRO 39: Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, page 347--358. Washington, DC, USA, IEEE Computer Society, (2006)
  to Multi-Core Power-Management Scheduling phd_uncassified4 by derkling on Aug 25, 2009, 11:42 AM
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• Software-Controlled Priority Characterization of POWER5 Processor.
  Carlos Boneti and Francisco J. Cazorla and Roberto Gioiosa and Alper Buyuktosunoglu and Chen-Yong Cher and Mateo Valero ISCA, page 415-426. IEEE, (2008)
  to dblp by dblp on Mar 20, 2009, 12:00 AM
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• A High Performance, Energy Efficient GALS ProcessorMicroarchitecture with Reduced Implementation Complexity.
  YongKang Zhu and David H. Albonesi and Alper Buyuktosunoglu ISPASS, page 42-53. IEEE Computer Society, (2005)
  to dblp by dblp on Oct 22, 2008, 12:00 AM
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• Evaluating design tradeoffs in on-chip power management for CMPs.
  Joseph J. Sharkey and Alper Buyuktosunoglu and Pradip Bose ISLPED, page 44-49. ACM, (2007)
  to dblp by dblp on Jun 5, 2008, 12:00 AM
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• Exploring power management in multi-core systems.
  Reinaldo A. Bergamaschi and Guoling Han and Alper Buyuktosunoglu and Hiren Patel and Indira Nair and Gero Dittmann and Geert Janssen and Nagu R. Dhanwada and Zhigang Hu and Pradip Bose and John A. Darringer ASP-DAC, page 708-713. IEEE, (2008)
  to dblp by dblp on May 6, 2008, 12:00 AM
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• Performance modeling for early analysis of multi-core systems.
  Reinaldo A. Bergamaschi and Indira Nair and Gero Dittmann and Hiren Patel and Geert Janssen and Nagu R. Dhanwada and Alper Buyuktosunoglu and Emrah Acar and Gi-Joon Nam and Dorothy Kucar and Pradip Bose and John A. Darringer and Guoling Han CODES+ISSS, page 209-214. ACM, (2007)
  to dblp by dblp on Apr 8, 2008, 12:00 AM
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• Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.
  Pradip Bose and David Brooks and Alper Buyuktosunoglu and Peter W. Cook and K. Das and Philip G. Emma and Michael Gschwind and Hans M. Jacobson and Tejas Karkhanis and Prabhakar Kudva and Stanley Schuster and James E. Smith and Viji Srinivasan and Victor V. Zyuban and David H. Albonesi and Sandhya Dwarkadas PACS, volume 2325 of Lecture Notes in Computer Science, page 1-17. Springer, (2002)
  to dblp by dblp on Sep 21, 2007, 12:00 AM
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• An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget.
  Canturk Isci and Alper Buyuktosunoglu and Chen-Yong Cher and Pradip Bose and Margaret Martonosi MICRO, page 347-358. IEEE Computer Society, (2006)
  to dblp by dblp on Jan 23, 2007, 12:00 AM
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• An Adaptive Issue Queue for Reduced Power at High Performance.
  Alper Buyuktosunoglu and Stanley Schuster and David Brooks and Pradip Bose and Peter W. Cook and David H. Albonesi PACS, volume 2008 of Lecture Notes in Computer Science, page 25-39. Springer, (2000)
  to dblp by dblp on Oct 30, 2006, 12:00 AM
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• Long-Term Workload Phases: Duration Predictions and Applications to DVFS.
  Canturk Isci and Alper Buyuktosunoglu and Margaret Martonosi IEEE Micro25(5):39-51(2005)
  to dblp by dblp on May 10, 2006, 12:00 AM
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• Tradeoffs in power-efficient issue queue design.
  Alper Buyuktosunoglu and David H. Albonesi and Pradip Bose and Peter W. Cook and Stanley Schuster ISLPED, page 184-189. ACM, (2002)
  to dblp by dblp on Feb 15, 2006, 12:00 AM
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• Microarchitectural techniques for power gating of execution units.
  Zhigang Hu and Alper Buyuktosunoglu and Viji Srinivasan and Victor V. Zyuban and Hans M. Jacobson and Pradip Bose ISLPED, page 32-37. ACM, (2004)
  to dblp by dblp on Feb 15, 2006, 12:00 AM
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• A circuit level implementation of an adaptive issue queue for power-aware microprocessors.
  Alper Buyuktosunoglu and David H. Albonesi and Stanley Schuster and David Brooks and Pradip Bose and Peter W. Cook ACM Great Lakes Symposium on VLSI, page 73-78. ACM, (2001)
  to dblp by dblp on Feb 10, 2006, 12:00 AM
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• Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors.
  Hans M. Jacobson and Pradip Bose and Zhigang Hu and Alper Buyuktosunoglu and Victor V. Zyuban and Rick Eickemeyer and Lee Eisen and John Griswell and Doug Logan and Balaram Sinharoy and Joel M. Tendler HPCA, page 238-242. IEEE Computer Society, (2005)
  to dblp by dblp on Apr 4, 2005, 12:00 AM
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• Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches.
  Rajeev Balasubramonian and Viji Srinivasan and Sandhya Dwarkadas and Alper Buyuktosunoglu PACS, volume 3164 of Lecture Notes in Computer Science, page 180-195. Springer, (2003)
  to dblp by dblp on Dec 30, 2004, 12:00 AM
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• Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors.
  David Brooks and Pradip Bose and Stanley Schuster and Hans M. Jacobson and Prabhakar Kudva and Alper Buyuktosunoglu and John-David Wellman and Victor V. Zyuban and Manish Gupta and Peter W. Cook IEEE Micro20(6):26-44(2000)
  to dblp by dblp on Dec 9, 2004, 12:00 AM
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