sign in · help · news · about ·

BibSonomy :: author :: Buyuktosunoglu ::

tag user group author concept BibTeX key search:all

The blue social bookmark and publication sharing system.

>
|
<

bookmarks

bookmarks per page: 5 10 20 50 100

RSS BibTeX RDF more

publications

(38)

<< < 1 | 2 > >>

CPU Accounting for Multicore Processors.
Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, and Mateo Valero IEEE Trans. Computers 61(2):251-264 (2012)
to dblp by dblp on Jan 10, 2012, 12:00 AM
URL | BibTeX
Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power.
Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Greg Semeraro, Grigorios Magklis, and Michael L. Scott IEEE PACT, page 141-152. IEEE Computer Society, (2002)
to dblp by dblp on Jan 3, 2012, 12:00 AM
URL | BibTeX
Energy-Aware Accounting and Billing in Large-Scale Computing Facilities.
Victor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Eren Kursun, Canturk Isci, Alper Buyuktosunoglu, Pradip Bose, and Mateo Valero IEEE Micro 31(3):60-71 (2011)
to dblp by dblp on Nov 3, 2011, 12:00 AM
URL | BibTeX
Introducing the Adaptive Energy Management Features of the Power7 Chip.
Michael S. Floyd, Malcolm Allen-Ware, Karthick Rajamani, Bishop Brock, Charles Lefurgy, Alan J. Drake, Lorena Pesantez, Tilman Gloekler, José A. Tierno, Pradip Bose, and Alper Buyuktosunoglu IEEE Micro 31(2):60-75 (2011)
to dblp by dblp on Nov 3, 2011, 12:00 AM
URL | BibTeX
Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors.
David Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, and Peter W. Cook IEEE Micro 20(6):26-44 (2000)
to dblp by dblp on Nov 3, 2011, 12:00 AM
URL | BibTeX
CPU Accounting in CMP Processors.
Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, and Mateo Valero Computer Architecture Letters 8(1):17-20 (2009)
to dblp by dblp on Oct 25, 2011, 12:00 AM
URL | BibTeX
Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.
Pradip Bose, David Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, and Sandhya Dwarkadas PACS, volume 2325 of Lecture Notes in Computer Science, page 1-17. Springer, (2002)
to dblp by dblp on Jun 29, 2011, 12:00 AM
URL | BibTeX
An Adaptive Issue Queue for Reduced Power at High Performance.
Alper Buyuktosunoglu, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook, and David H. Albonesi PACS, volume 2008 of Lecture Notes in Computer Science, page 25-39. Springer, (2000)
to dblp by dblp on Jun 22, 2011, 12:00 AM
URL | BibTeX
Abstraction and microarchitecture scaling in early-stage power modeling.
Hans M. Jacobson, Alper Buyuktosunoglu, Pradip Bose, Emrah Acar, and Richard J. Eickemeyer HPCA, page 394-405. IEEE Computer Society, (2011)
to dblp by dblp on May 24, 2011, 12:00 AM
URL | BibTeX
A case for guarded power gating for multi-core processors.
Niti Madan, Alper Buyuktosunoglu, Pradip Bose, and Murali Annavaram HPCA, page 291-300. IEEE Computer Society, (2011)
to dblp by dblp on May 24, 2011, 12:00 AM
URL | BibTeX
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors.
Hans M. Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor V. Zyuban, Richard J. Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, and Joel M. Tendler HPCA, page 238-242. IEEE Computer Society, (2005)
to dblp by dblp and 1 other user on May 24, 2011, 12:00 AM
URL | BibTeX
Adaptive energy-management features of the IBM POWER7 chip.
Michael S. Floyd, Malcolm Allen-Ware, Karthick Rajamani, Tilman Gloekler, Bishop Brock, Pradip Bose, Alper Buyuktosunoglu, Juan C. Rubio, Birgit Schubert, Bruno Spruth, José A. Tierno, and Lorena Pesantez IBM Journal of Research and Development 55(3):8 (2011)
to dblp by dblp on May 4, 2011, 12:00 AM
URL | BibTeX
A Unified Prediction Method for Predicting Program Behavior.
Ruhi Sarikaya, and Alper Buyuktosunoglu IEEE Trans. Computers 59(2):272-282 (2010)
to dblp by dblp on Feb 18, 2011, 12:00 AM
URL | BibTeX
Power and thermal characterization of POWER6 system.
Victor Jiménez, Francisco J. Cazorla, Roberto Gioiosa, Mateo Valero, Carlos Boneti, Eren Kursun, Chen-Yong Cher, Canturk Isci, Alper Buyuktosunoglu, and Pradip Bose PACT, page 7-18. ACM, (2010)
to dblp by dblp on Feb 14, 2011, 12:00 AM
URL | BibTeX
Trends and techniques for energy efficient architectures.
Victor Jiménez, Roberto Gioiosa, Eren Kursun, Francisco J. Cazorla, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, and Mateo Valero VLSI-SoC, page 276-279. IEEE, (2010)
to dblp by dblp on Feb 14, 2011, 12:00 AM
URL | BibTeX
Program behavior prediction using a statistical metric model.
Ruhi Sarikaya, Canturk Isci, and Alper Buyuktosunoglu SIGMETRICS, page 371-372. ACM, (2010)
to dblp by dblp on Jul 21, 2010, 4:02 PM
URL | BibTeX
Power-efficient, reliable microprocessor architectures: modeling and design methods.
Pradip Bose, Alper Buyuktosunoglu, Chen-Yong Cher, John A. Darringer, Meeta Sharma Gupta, Hendrik F. Hamann, Hans M. Jacobson, Prabhakar Kudva, Eren Kursun, Niti Madan, Indira Nair, Jude A. Rivers, Jeonghee Shin, Alan J. Weger, and Victor V. Zyuban ACM Great Lakes Symposium on VLSI, page 299-304. ACM, (2010)
to dblp by dblp on Jul 21, 2010, 3:58 PM
URL | BibTeX
ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs.
Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, and Mateo Valero PACT, page 203-213. IEEE Computer Society, (2009)
to dblp by dblp on Jan 19, 2010, 12:00 AM
URL | BibTeX
Dynamic power gating with quality guarantees.
Anita Lungu, Pradip Bose, Alper Buyuktosunoglu, and Daniel J. Sorin ISLPED, page 377-382. ACM, (2009)
to dblp by dblp on Nov 20, 2009, 12:00 AM
URL | BibTeX
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors
Hans Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor Zyuban, Rick Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, and Joel Tendler HPCA '05: Proceedings of the 11th International Symposium on High-Performance Computer Architecture, page 238--242. Washington, DC, USA, IEEE Computer Society, (2005)
to Clock-Gating PhD_Background_Mechanisms PhD_Biblio by derkling and 1 other user on Aug 31, 2009, 3:54 PM
DOI | BibTeX

<< < 1 | 2 > >>publications per page: 5 10 20 50 100

a gripper