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(2)

• Low frequency noise and reliability properties pf 0.12 mum CMOS devices with Ta2O5 as gate dielectrics.
  M. Fadlallah and A. Szewczyk and C. Giannakopoulos and B. Cretu and F. Monsieur and T. Devoivre and J. Jomaah and G. Ghibaudo Microelectronics Reliability 41 1361-1366 (2001)
  to dblp by dblp on 2007-03-25 00:00:00
  | URL | BibTeX  
• Validated 90nm CMOS Technology Platform with Low-k Copper Interconnects for Advanced System-on-Chip (SoC).
  T. Devoivre and M. Lunenborg and C. Julien and J.-P. Carrere and P. Ferreira and W. J. Toren and A. VandeGoor and P. Gayet and T. Berger and O. Hinsinger and P. Vannier and Y. Trouiller and Y. Rody and P.-J. Goirand and R. Palla and I. Thomas and F. Guyader and D. Roy and B. Borot and N. Planes and S. Naudet and F. Pico and D. Duca and F. Lalanne and D. Heslinga and M. Haond MTDT 157-162 (2002)
  to dblp by dblp on 2003-12-15 00:00:00
  | URL | BibTeX