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Plan Recognition for Airborne Tactical Decision Making.
Jerome Azarewicz, Glenn Fala, Ralph Fink, and Christof Heithecker AAAI, page 805-811. Morgan Kaufmann, (1986)
to dblp by dblp on Dec 23, 2011, 12:00 AM
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A High-End Real-Time Digital Film Processing Reconfigurable Platform.
Sven Heithecker, Amilcar do Carmo Lucas, and Rolf Ernst EURASIP J. Emb. Sys. (2007)
to dblp by dblp on Feb 28, 2011, 12:00 AM
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Application development with the FlexWAFE real-time stream processing architecture for FPGAs.
Amilcar do Carmo Lucas, Henning Sahlbach, Sean Whitty, Sven Heithecker, and Rolf Ernst ACM Trans. Embedded Comput. Syst. (2009)
to dblp by dblp and 1 other user on Mar 17, 2010, 12:00 AM
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Credit Risk of Collaterals: Examining the Systematic Linkage between Insolvencies and Physical Assets in Germany.
Marc Gürtler, Dirk Heithecker, and Sven Olboeter GfKl, page 531-538. Springer, (2006)
to dblp by dblp on Sep 11, 2009, 12:00 AM
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Aufsichtsrechtliche Kreditportfoliomodelle
Dirk Heithecker Dissertation.de dissertation.de, Berlin, (2007)
to Bank Bankenaufsicht Bankrecht Basel_II Basler_Eigenkapitalvereinbarung_<2001> Börsenrecht Finanzierung Geld Inflation Investition Kapitalmarkt Kreditrisiko Mathematisches_Modell Messung Portfolio-Management Wirtschaftsmodell by fbw_hannover on Aug 21, 2009, 12:22 PM
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Optimizing Credit Risk Mitigation Effects of Collaterals Under Basel II.
Marc Gürtler, Dirk Heithecker, and Martin Hibbeln OR, page 293-298. (2006)
to dblp by dblp on Jul 4, 2008, 12:00 AM
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FlexFilm - an Image Processor for Digital Film Processing.
Sven Heithecker, Amilcar do Carmo Lucas, and Rolf Ernst Dynamically Reconfigurable Architectures, volume 06141 of Dagstuhl Seminar Proceedings, Internationales Begegnungs- und Forschungszentrum fuer Informatik IBFI, Schloss Dagstuhl, Germany, (2006)
to dblp by dblp on May 14, 2008, 12:00 AM
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FlexWAFE - A High-end Real-Time Stream Processing Library for FPGAs.
Amilcar do Carmo Lucas, Sven Heithecker, and Rolf Ernst DAC, page 916-921. IEEE, (2007)
to dblp by dblp on Jun 29, 2007, 12:00 AM
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A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications.
Amilcar do Carmo Lucas, Sven Heithecker, Peter Rüffer, Rolf Ernst, Holger Rückert, Gerhard Wischermann, Karin Gebel, Reinhard Fach, Wolfgang Huther, Stefan Eichner, and Gunter Scheller DATE, page 194-199. European Design and Automation Association, Leuven, Belgium, (2006)
to dblp by dblp on Sep 15, 2006, 12:00 AM
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An FPGA based SDRAM controller with complex QoS scheduling and traffic shaping abstract only.
Sven Heithecker, and Rolf Ernst FPGA, page 277. ACM, (2005)
to dblp by dblp on Feb 13, 2006, 12:00 AM
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Traffic shaping for an FPGA based SDRAM controller with complex QoS requirements.
Sven Heithecker, and Rolf Ernst DAC, page 575-578. ACM, (2005)
to dblp by dblp and 1 other user on Feb 10, 2006, 12:00 AM
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An Area-Efficient Bit-Serial Integer Multiplier.
Manfred Schimmler, Bertil Schmidt, Hans-Werner Lang, and Sven Heithecker VLSI, page 131-137. CSREA Press, (2003)
to dblp by dblp on Oct 17, 2003, 12:00 AM
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Fuzzy Logic und der ``Tierhalter''.
Jan Heithecker KI 7(3):7-10 (1993)
to dblp by dblp on Jan 3, 2002, 12:00 AM
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