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Irith Pomeranz
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(479)
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Computing Two-Pattern Test Cubes for Transition Path Delay Faults.
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
21(3):475-485
(
2013
)
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
21(3):475-485
(
2013
)
2 months and 23 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Generation of Functional Broadside Tests for Logic Blocks With Constrained Primary Input Sequences.
Irith Pomeranz
.
IEEE Trans. on CAD of Integrated Circuits and Systems
32(3):442-452
(
2013
)
Irith Pomeranz
.
IEEE Trans. on CAD of Integrated Circuits and Systems
32(3):442-452
(
2013
)
2 months and 26 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
A test pattern ordering algorithm for diagnosis with truncated fail data.
Gang Chen 0011
,
Sudhakar M. Reddy
,
Irith Pomeranz
, and
Janusz Rajski
.
DAC,
page 399-404.
ACM,
(
2006
)
Gang Chen 0011
,
Sudhakar M. Reddy
,
Irith Pomeranz
, and
Janusz Rajski
.
DAC,
page 399-404.
ACM,
(
2006
)
3 months and 19 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
New Procedures to Identify Redundant Stuck-At Faults and Removal of Redundant Logic.
Gang Chen 0011
,
Sudhakar M. Reddy
,
Irith Pomeranz
, and
Janusz Rajski
.
VLSI Design,
page 419-424.
IEEE Computer Society,
(
2006
)
Gang Chen 0011
,
Sudhakar M. Reddy
,
Irith Pomeranz
, and
Janusz Rajski
.
VLSI Design,
page 419-424.
IEEE Computer Society,
(
2006
)
3 months and 19 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
N-distinguishing Tests for Enhanced Defect Diagnosis.
Gang Chen 0011
,
Janusz Rajski
,
Sudhakar M. Reddy
, and
Irith Pomeranz
.
Asian Test Symposium,
page 183-186.
IEEE Computer Society,
(
2009
)
Gang Chen 0011
,
Janusz Rajski
,
Sudhakar M. Reddy
, and
Irith Pomeranz
.
Asian Test Symposium,
page 183-186.
IEEE Computer Society,
(
2009
)
3 months and 19 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Defect Aware Test Patterns.
Huaxing Tang
,
Gang Chen 0011
,
Sudhakar M. Reddy
,
Chen Wang
,
Janusz Rajski
, and
Irith Pomeranz
.
DATE,
page 450-455.
IEEE Computer Society,
(
2005
)
Huaxing Tang
,
Gang Chen 0011
,
Sudhakar M. Reddy
,
Chen Wang
,
Janusz Rajski
, and
Irith Pomeranz
.
DATE,
page 450-455.
IEEE Computer Society,
(
2005
)
3 months and 19 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Procedures for Identifying Untestable and Redundant Transition Faults in Synchronous Sequential Circuits.
Gang Chen 0011
,
Sudhakar M. Reddy
, and
Irith Pomeranz
.
ICCD,
page 36-41.
IEEE Computer Society,
(
2003
)
Gang Chen 0011
,
Sudhakar M. Reddy
, and
Irith Pomeranz
.
ICCD,
page 36-41.
IEEE Computer Society,
(
2003
)
3 months and 19 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Built-In Generation of Functional Broadside Tests Using a Fixed Hardware Structure.
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
21(1):124-132
(
2013
)
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
21(1):124-132
(
2013
)
4 months and 16 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Maintaining proximity to functional operation conditions under enhanced-scan tests based on functional broadside tests.
Irith Pomeranz
.
DFT,
page 239-244.
IEEE Computer Society,
(
2012
)
Irith Pomeranz
.
DFT,
page 239-244.
IEEE Computer Society,
(
2012
)
4 months and 16 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Built-in generation of multi-cycle broadside tests.
Irith Pomeranz
.
DFT,
page 146-151.
IEEE Computer Society,
(
2012
)
Irith Pomeranz
.
DFT,
page 146-151.
IEEE Computer Society,
(
2012
)
4 months and 16 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Generation and compaction of mixed broadside and skewed-load n-detection test sets for transition faults.
Irith Pomeranz
.
DFT,
page 37-42.
IEEE Computer Society,
(
2012
)
Irith Pomeranz
.
DFT,
page 37-42.
IEEE Computer Society,
(
2012
)
4 months and 16 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
An Adjacent Switching Activity Metric under Functional Broadside Tests.
Irith Pomeranz
.
IEEE Trans. Computers
62(2):404-410
(
2013
)
Irith Pomeranz
.
IEEE Trans. Computers
62(2):404-410
(
2013
)
4 months and 17 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Estimating the relative single stuck-at fault coverage of test sets for a combinational logic block from its functional description.
Irith Pomeranz
, and
Sudhakar M. Reddy
.
HLDVT,
page 31-35.
IEEE Computer Society,
(
2001
)
Irith Pomeranz
, and
Sudhakar M. Reddy
.
HLDVT,
page 31-35.
IEEE Computer Society,
(
2001
)
5 months and 23 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
On compacting test sets by addition and removal of test vectors.
Seiji Kajihara
,
Irith Pomeranz
,
Kozo Kinoshita
, and
Sudhakar M. Reddy
.
VTS,
page 202-207.
IEEE Computer Society,
(
1994
)
Seiji Kajihara
,
Irith Pomeranz
,
Kozo Kinoshita
, and
Sudhakar M. Reddy
.
VTS,
page 202-207.
IEEE Computer Society,
(
1994
)
6 months and 6 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
On identifying undetectable and redundant faults in synchronous sequential circuits.
Irith Pomeranz
, and
Sudhakar M. Reddy
.
VTS,
page 8-14.
IEEE Computer Society,
(
1994
)
Irith Pomeranz
, and
Sudhakar M. Reddy
.
VTS,
page 8-14.
IEEE Computer Society,
(
1994
)
6 months and 6 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
On the Detectability of Scan Chain Internal Faults - An Industrial Case Study.
Fan Yang
,
Sreejit Chakravarty
,
Narendra Devta-Prasanna
,
Sudhakar M. Reddy
, and
Irith Pomeranz
.
VTS,
page 79-84.
IEEE Computer Society,
(
2008
)
Fan Yang
,
Sreejit Chakravarty
,
Narendra Devta-Prasanna
,
Sudhakar M. Reddy
, and
Irith Pomeranz
.
VTS,
page 79-84.
IEEE Computer Society,
(
2008
)
6 months and 10 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
A Metric for Identifying Detectable Path Delay Faults.
Irith Pomeranz
.
IEEE Trans. on CAD of Integrated Circuits and Systems
31(11):1734-1742
(
2012
)
Irith Pomeranz
.
IEEE Trans. on CAD of Integrated Circuits and Systems
31(11):1734-1742
(
2012
)
6 months and 28 days ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Multicycle Tests With Constant Primary Input Vectors for Increased Fault Coverage.
Irith Pomeranz
.
IEEE Trans. on CAD of Integrated Circuits and Systems
31(9):1428-1438
(
2012
)
Irith Pomeranz
.
IEEE Trans. on CAD of Integrated Circuits and Systems
31(9):1428-1438
(
2012
)
7 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Generation of Mixed Test Sets for Transition Faults.
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
20(10):1895-1899
(
2012
)
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
20(10):1895-1899
(
2012
)
9 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
Non-Uniform Coverage by n -Detection Test Sets.
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
20(11):2138-2142
(
2012
)
Irith Pomeranz
.
IEEE Trans. VLSI Syst.
20(11):2138-2142
(
2012
)
9 months ago
by
dblp
1
dblp
dblp
URL
DOI
TeX
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