BibSonomy :: author  :: Sathe ::

bookmarks

publications

(13)

• A Novel Bayesian Classifier using Copula Functions
  Saket Sathe CoRR abs/cs/0611150 (2006)
  to dblp by dblp on 2008-01-02 00:00:00
  | URL | BibTeX  
• Modeling and Analysis of Noise Margin in SET Logic.
  Chaitanya Sathe and Santanu Mahapatra VLSI Design 207-214 (2007)
  to dblp by dblp on 2007-03-26 00:00:00
  | URL | BibTeX  
• Static Program Partitioning for Embedded Processors.
  Bageshri Sathe and Uday P. Khedker ESA 31-37 (2006)
  to dblp by dblp on 2007-01-02 00:00:00
  | URL | BibTeX  
• Complexity of Data Flow Analysis for Non-Separable Frameworks.
  Bageshri Sathe and Uday P. Khedker Software Engineering Research and Practice 828-836 (2006)
  to dblp by dblp on 2006-11-29 00:00:00
  | URL | BibTeX  
• i3: Intelligent, Interactive Investigaton of OLAP data cubes.
  Sunita Sarawagi and Gayatri Sathe SIGMOD Conference 589 (2000)
  to dblp by dblp on 2006-03-31 00:00:00
  | URL | BibTeX  
• A GHz-class charge recovery logic.
  Visvesh S. Sathe and Marios C. Papaefthymiou and Conrad H. Ziesler ISLPED 91-94 (2005)
  to dblp by dblp on 2006-02-15 00:00:00
  | URL | BibTeX  
• A 225 MHz resonant clocked ASIC chip.
  Conrad H. Ziesler and Joohee Kim and Visvesh S. Sathe and Marios C. Papaefthymiou ISLPED 48-53 (2003)
  to dblp by dblp on 2006-02-15 00:00:00
  | URL | BibTeX  
• Fast, efficient, recovering, and irreversible.
  Visvesh S. Sathe and Juang-Ying Chueh and Joohee Kim and Conrad H. Ziesler and Suhwan Kim and Marios C. Papaefthymiou Conf. Computing Frontiers 407-413 (2005)
  to dblp by dblp on 2006-02-15 00:00:00
  | URL | BibTeX  
• Boost Logic: A High Speed Energy Recovery Circuit Family.
  Visvesh S. Sathe and Marios C. Papaefthymiou and Conrad H. Ziesler ISVLSI 22-27 (2005)
  to dblp by dblp on 2005-11-28 00:00:00
  | URL | BibTeX  
• Network on Chip Simulations for Benchmarking.
  Daniel Wiklund and Sumant Sathe and Dake Liu IWSOC 269-274 (2004)
  to dblp by dblp on 2005-07-25 00:00:00
  | URL | BibTeX