BibSonomy ::  author :: Schlör ::

bookmarks

publications

• VHDL/S - integrating statecharts, timing diagrams, and VHDL.
  J. Helbig and Rainer Schlör and Werner Damm and Gert Döhmen and Peter Kelb Microprocessing and Microprogramming38(1-5):571-580(1993)
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• Cost-Efficient Worst-Case Execution Time Analysis in Industrial Practice.
  Jan Staschulat and Jörn-Christian Braam and Rolf Ernst and Thomas Rambow and Rainer Schlör and Rainer Busch ISoLA, page 204-211. IEEE, (2006)
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• Interface Controller Synthesis from Requirement Specifications.
  Franz Korf and Rainer Schlör EDAC-ETC-EUROASIC, page 385-394. IEEE Computer Society, (1994)
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• Verification of a production cell controller using symbolic timing diagrams.
  Rainer Schlör and Franz Korf EURO-DAC, page 548-553. IEEE Computer Society, (1995)
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• Using a Visual Formalism for Design Verification in Industrial Environments.
  Rainer Schlör and Bernhard Josko and Dieter Werth Services and Visualization: Towards User-Friendly Design, volume 1385 of Lecture Notes in Computer Science, page 208-221. Springer, (1998)
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• Statecharts.
  Werner Damm and Hardi Hungar and Peter Kelb and Rainer Schlör Formal Development of Reactive Systems, volume 891 of Lecture Notes in Computer Science, page 131-149. Springer, (1995)
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• Symbolic Timing Diagrams.
  Franz Korf and Rainer Schlör Formal Development of Reactive Systems, volume 891 of Lecture Notes in Computer Science, page 311-331. Springer, (1995)
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