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publications

(30)

• Verification of evolving software via component substitutability analysis.
  Sagar Chaki and Edmund M. Clarke and Natasha Sharygina and Nishant Sinha Formal Methods in System Design 32 235-266 (2008)
  to dblp by dblp on 2008-05-28 00:00:00
  | URL | BibTeX  
• Scoot: A Tool for the Analysis of SystemC Models.
  Nicolas Blanc and Daniel Kroening and Natasha Sharygina TACAS 467-470 (2008)
  to dblp by dblp on 2008-04-21 00:00:00
  | URL | BibTeX  
• Word-Level Predicate-Abstraction and Refinement Techniques for Verifying RTL Verilog.
  Himanshu Jain and Daniel Kroening and Natasha Sharygina and Edmund M. Clarke IEEE Trans. on CAD of Integrated Circuits and Systems 27 366-379 (2008)
  to dblp by dblp on 2008-04-08 00:00:00
  | URL | BibTeX  
• Verification of Boolean programs with unbounded thread creation.
  Byron Cook and Daniel Kroening and Natasha Sharygina Theor. Comput. Sci. 388 227-242 (2007)
  to dblp by dblp on 2008-01-31 00:00:00
  | URL | BibTeX  
• Model Checking with Abstraction for Web Services.
  Natasha Sharygina and Daniel Kröning Test and Analysis of Web Services 121-145 (2007)
  to dblp by dblp on 2007-11-29 00:00:00
  | URL | BibTeX  
• Specification and verification of component-based systems 2007.
  Jonathan Aldrich and Mike Barnett and Dimitra Giannakopoulou and Gary T. Leavens and Natasha Sharygina ESEC/SIGSOFT FSE 609-610 (2007)
  to dblp by dblp on 2007-10-23 00:00:00
  | URL | BibTeX  
• Automated Verification of Security Policies in Mobile Code.
  Chiara Braghin and Natasha Sharygina and Katerina Barone-Adesi IFM 37-53 (2007)
  to dblp by dblp on 2007-09-20 00:00:00
  | URL | BibTeX  
• Program Compatibility Approaches.
  Edmund M. Clarke and Natasha Sharygina and Nishant Sinha FMCO 243-258 (2005)
  to dblp by dblp on 2007-08-02 00:00:00
  | URL | BibTeX  
• VCEGAR: Verilog CounterExample Guided Abstraction Refinement.
  Himanshu Jain and Daniel Kroening and Natasha Sharygina and Edmund M. Clarke TACAS 583-586 (2007)
  to dblp by dblp on 2007-08-02 00:00:00
  | URL | BibTeX  
• Interactive presentation: Image computation and predicate refinement for RTL verilog using word level proofs.
  Daniel Kroening and Natasha Sharygina DATE 1325-1330 (2007)
  to dblp by dblp on 2007-06-22 00:00:00
  | URL | BibTeX