Bibsonomy :: author  ::

bookmarks

publications

(30)

• Low-Transition Test Pattern Generation for BIST-Based Applications.
  Mehrdad Nourani and Mohammad Tehranipoor and Nisar Ahmed IEEE Trans. Computers 57 303-315 (2008)
  to dblp by dblp on 2008-06-05 00:00:00
  | URL | BibTeX  
• Test-Pattern Grading and Pattern Selection for Small-Delay Defects.
  Mahmut Yilmaz and Krishnendu Chakrabarty and Mohammad Tehranipoor VTS 233-239 (2008)
  to dblp by dblp on 2008-05-07 00:00:00
  | URL | BibTeX  
• LS-TDF: Low-Switching Transition Delay Fault Pattern Generation.
  Jeremy Lee and Mohammad Tehranipoor VTS 227-232 (2008)
  to dblp by dblp on 2008-05-07 00:00:00
  | URL | BibTeX  
• Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics.
  Mohammad Tehranipoor and Reza M. Rad IEEE Trans. on CAD of Integrated Circuits and Systems 26 943-958 (2007)
  to dblp by dblp on 2008-04-08 00:00:00
  | URL | BibTeX  
• Local At-Speed Scan Enable Generation for Transition Fault Testing Using Low-Cost Testers.
  Nisar Ahmed and Mohammad Tehranipoor and C. P. Ravikumar and Kenneth M. Butler IEEE Trans. on CAD of Integrated Circuits and Systems 26 896-906 (2007)
  to dblp by dblp on 2008-04-08 00:00:00
  | URL | BibTeX  
• Evaluating area and performance of hybrid FPGAs with nanoscale clusters and CMOS routing.
  Reza M. Rad and Mohammad Tehranipoor JETC 3 (2007)
  to dblp by dblp on 2007-12-10 00:00:00
  | URL | BibTeX  
• Securing Designs against Scan-Based Side-Channel Attacks.
  Jeremy Lee and Mohammad Tehranipoor and Chintan Patel and Jim Plusquellic IEEE Trans. Dependable Sec. Comput. 4 325-336 (2007)
  to dblp by dblp on 2007-11-08 00:00:00
  | URL | BibTeX  
• A critical-path-aware partial gating approach for test power reduction.
  Mohammed ElShoukry and Mohammad Tehranipoor and C. P. Ravikumar ACM Trans. Design Autom. Electr. Syst. 12 (2007)
  to dblp by dblp on 2007-11-06 00:00:00
  | URL | BibTeX  
• Guest Editorial.
  Mohammad Tehranipoor J. Electronic Testing 23 115-116 (2007)
  to dblp by dblp on 2007-09-18 00:00:00
  | URL | BibTeX  
• Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design.
  Nisar Ahmed and Mohammad Tehranipoor and Vinay Jayaram DAC 533-538 (2007)
  to dblp by dblp on 2007-06-29 00:00:00
  | URL | BibTeX