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Testing switched Ethernet networks in automotive embedded systems.
Andreas Kern, Hongyan Zhang, Thilo Streichert, and Jürgen Teich SIES, page 150-155. IEEE, (2011)
to dblp by dblp on Feb 3, 2012, 12:00 AM
URL | BibTeX
Design and architectures for dependable embedded systems.
Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, and Hans-Joachim Wunderlich CODES+ISSS, page 69-78. ACM, (2011)
to dblp by dblp on Jan 26, 2012, 12:00 AM
URL | BibTeX
SystemCoDesigner - an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications.
Joachim Keinert, Martin Streubühr, Thomas Schlichter, Joachim Falk, Jens Gladigau, Christian Haubelt, Jürgen Teich, and Michael Meredith ACM Trans. Design Autom. Electr. Syst. (2009)
to dblp by dblp on Jan 25, 2012, 12:00 AM
URL | BibTeX
Runtime stress-aware replica placement on reconfigurable devices under safety constraints.
Josef Angermeier, Daniel Ziener, Michael Glaß, and Jürgen Teich FPT, page 1-6. IEEE, (2011)
to dblp by dblp on Jan 25, 2012, 12:00 AM
URL | BibTeX
Operational mode exploration for reconfigurable systems with multiple applications.
Stefan Wildermann, Felix Reimann, Jürgen Teich, and Zoran Salcic FPT, page 1-8. IEEE, (2011)
to dblp by dblp on Jan 25, 2012, 12:00 AM
URL | BibTeX
An FPGA implementation of a threat-based strategy for Connect6.
Tobias Ziermann, Bernhard Schmidt, Moritz Mühlenthaler, Daniel Ziener, Josef Angermeier, and Jürgen Teich FPT, page 1-4. IEEE, (2011)
to dblp by dblp on Jan 25, 2012, 12:00 AM
URL | BibTeX
Towards Symbolic Run-Time Reconfiguration in Tightly-Coupled Processor Arrays.
Srinivas Boppu, Frank Hannig, Jürgen Teich, and Roberto Perez-Andrade ReConFig, page 392-397. IEEE Computer Society, (2011)
to dblp by dblp on Jan 20, 2012, 12:00 AM
URL | BibTeX
Self-reconfigurable Finite State Machines: Theory and Implementation.
Jürgen Teich, and Markus Köster DATE, page 559-566. IEEE Computer Society, (2002)
to dblp by dblp on Jan 6, 2012, 12:00 AM
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Scalable Many-Domain Power Gating in Coarse-Grained Reconfigurable Processor Arrays.
Dmitrij Kissler, D. Gran, Zoran Salcic, Frank Hannig, and Jürgen Teich Embedded Systems Letters 3(2):58-61 (2011)
to dblp by dblp on Dec 5, 2011, 12:00 AM
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Emphatic generation: employing the theory of semantic emphasis for text generation
Elke Teich, Beate Firzlaff, and John A. Bateman CoRR (1997)
to dblp by dblp on Dec 5, 2011, 12:00 AM
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No-Break Dynamic Defragmentation of Reconfigurable
Sándor P. Fekete, Tom Kamphans, Nils Schweer, Christopher Tessars, Jan van der Veen, Josef Angermeier, Dirk Koch, and Jürgen Teich CoRR (2010)
to dblp by dblp on Dec 5, 2011, 12:00 AM
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DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices
Christophe Bobda, Ali Ahmadinia, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, and Jan van der Veen CoRR (2005)
to dblp by dblp and 1 other user on Dec 5, 2011, 12:00 AM
URL | BibTeX
Optimal Routing-Conscious Dynamic Placement for Reconfigurable Devices
Ali Ahmadinia, Christophe Bobda, Sándor P. Fekete, Jürgen Teich, and Jan van der Veen CoRR (2004)
to dblp by dblp and 1 other user on Dec 5, 2011, 12:00 AM
URL | BibTeX
Higher-Dimensional Packing with Order Constraints
Sándor P. Fekete, Ekkehard Köhler, and Jürgen Teich CoRR (2003)
to dblp by dblp on Dec 5, 2011, 12:00 AM
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A Practical Approach for Circuit Routing on Dynamic Reconfigurable Devices
Ali Ahmadinia, Christophe Bobda, Ji Ding, Mateusz Majer, Jürgen Teich, Sándor P. Fekete, and Jan van der Veen CoRR (2005)
to dblp by dblp and 1 other user on Dec 5, 2011, 12:00 AM
URL | BibTeX
Maintaining Virtual Areas on FPGAs using Strip Packing with Delays
Josef Angermeier, Sándor P. Fekete, Tom Kamphans, Nils Schweer, and Jürgen Teich CoRR (2010)
to dblp by dblp on Dec 5, 2011, 12:00 AM
URL | BibTeX
Defragmenting the Module Layout of a Partially Reconfigurable Device
Jan van der Veen, Sándor P. Fekete, Ali Ahmadinia, Christophe Bobda, Frank Hannig, and Jürgen Teich CoRR (2005)
to dblp by dblp on Dec 5, 2011, 12:00 AM
URL | BibTeX
System-Level Synthesis Using Evolutionary Algorithms.
Tobias Blickle, Jürgen Teich, and Lothar Thiele Design Autom. for Emb. Sys. 3(1):23-58 (1998)
to dblp by dblp on Dec 1, 2011, 12:00 AM
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CODES+ISSS 2007 guest editors' introduction.
Nikil Dutt, and Jürgen Teich Design Autom. for Emb. Sys. 13(1-2):51-52 (2009)
to dblp by dblp on Nov 29, 2011, 12:00 AM
URL | BibTeX
Digitale Hardware/Software-Systeme Synthese und Optimierung
Jürge Teich, and Christian. Haubelt (2007)
to ALAP ASAP Force-directed-listscheduling Listscheduling by h.s. on Nov 23, 2011, 11:13 AM
URL | BibTeX

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