BibSonomy :: author  ::

bookmarks

publications

(41)

• RAMP Blue: A Message-Passing Manycore System in FPGAs.
  Alex Krasnov and Andrew Schultz and John Wawrzynek and Greg Gibeling and Pierre-Yves Droz FPL 54-61 (2007)
  to dblp by dblp on 2008-11-17 00:00:00
  | URL | BibTeX  
• Adventures with a Reconfigurable Research Platform.
  John Wawrzynek FPL 3 (2007)
  to dblp by dblp on 2008-11-17 00:00:00
  | URL | BibTeX  
• Using simulations of reduced precision arithmetic to design a neuro-microprocessor.
  Krste Asanovic and Nelson Morgan and John Wawrzynek VLSI Signal Processing 6 33-44 (1993)
  to dblp by dblp on 2008-08-07 00:00:00
  | URL | BibTeX  
• RAMP: Research Accelerator for Multiple Processors.
  John Wawrzynek and David Patterson and Mark Oskin and Shih-Lien Lu and Christoforos E. Kozyrakis and James C. Hoe and Derek Chiou and Krste Asanovic IEEE Micro 27 46-57 (2007)
  to dblp by dblp on 2007-11-08 00:00:00
  | URL | BibTeX  
• The Garp Architecture and C Compiler
  Timothy J. Callahan and John R. Hauser and John Wawrzynek Computer 33 62--69 (2000)
  to architecture reconfigurable stateOfArt by oliveira on 2007-07-18 08:48:16
  | URL | BibTeX  
• Computational Science Simulations Based on Web Services.
  L. Paul Chew and Nikos Chrisochoides and S. Gopalsamy and Gerd Heber and Anthony R. Ingraffea and Edward Luke and Joaquim B. Cavalcante Neto and Keshav Pingali and Alan M. Shih and Bharat K. Soni and Paul Stodghill and David Thompson and Stephen A. Vavasis and Paul A. Wawrzynek International Conference on Computational Science 299-308 (2003)
  to dblp by dblp on 2007-05-14 00:00:00
  | URL | BibTeX  
• Stream computations organized for reconfigurable execution.
  André DeHon and Yury Markovskiy and Eylon Caspi and Michael Chu and Randy Huang and Stylianos Perissakis and Laura Pozzi and Joseph Yeh and John Wawrzynek Microprocessors and Microsystems 30 334-354 (2006)
  to dblp by dblp on 2007-03-21 00:00:00
  | URL | BibTeX  
• Stochastic spatial routing for reconfigurable networks.
  André DeHon and Randy Huang and John Wawrzynek Microprocessors and Microsystems 30 301-318 (2006)
  to dblp by dblp on 2007-03-21 00:00:00
  | URL | BibTeX  
• BEE2: A High-End Reconfigurable Computing System.
  Chen Chang and John Wawrzynek and Robert W. Brodersen IEEE Design & Test of Computers 22 114-125 (2005)
  to dblp by dblp on 2006-04-27 00:00:00
  | URL | BibTeX  
• The SFRA: a corner-turn FPGA architecture.
  Nicholas Weaver and John R. Hauser and John Wawrzynek FPGA 3-12 (2004)
  to dblp by dblp on 2006-02-13 00:00:00
  | URL | BibTeX