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Power-scan chain: design for analog testability.
Amir Zjajo, Hendrik J. Bergveld, Rodger Schuttert, and José Pineda de Gyvez ITC, page 8. IEEE, (2005)
to dblp by dblp on Feb 7, 2012, 12:00 AM
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Digital cartesian feedback linearization of switched mode power amplifiers.
Alejandro Viteri, Amir Zjajo, Thijmen Hamoen, and Nick van der Meijs ICECS, page 890-893. IEEE, (2010)
to dblp by dblp on Nov 29, 2011, 12:00 AM
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Stochastic Analysis of Deep-Submicrometer CMOS Process for Reliable Circuits Designs.
Amir Zjajo, Qin Tang, Michel Berkelaar, José Pineda de Gyvez, Alessandro Di Bucchianico, and Nick van der Meijs IEEE Trans. on Circuits and Systems 58-I(1):164-175 (2011)
to dblp by dblp on Oct 20, 2011, 12:00 AM
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Noise analysis of non-linear dynamic integrated circuits.
Amir Zjajo, Qin Tang, Michel Berkelaar, and Nick van der Meijs CICC, page 1-4. IEEE, (2010)
to dblp by dblp on Sep 23, 2011, 12:00 AM
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Pseudo circuit model for representing uncertainty in waveforms.
Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, and Nick van der Meijs DATE, page 1521-1524. IEEE, (2011)
to dblp by dblp on Sep 2, 2011, 12:00 AM
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Statistical Moment Estimation of Delay and Power in Circuit Simulation.
Ashish Nigam, Qin Tang, Amir Zjajo, Michel Berkelaar, and Nick van der Meijs J. Low Power Electronics 6(4):578-587 (2010)
to dblp by dblp on Apr 12, 2011, 12:00 AM
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Analog Automatic Test Pattern Generation for Quasi-Static Structural Test.
Amir Zjajo, and José Pineda de Gyvez IEEE Trans. VLSI Syst. 17(10):1383-1391 (2009)
to dblp by dblp on Nov 16, 2010, 12:00 AM
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Algorithms for ADC Multi-site Test with Digital Input Stimulus.
Xiaoqin Sheng, Hans G. Kerkhoff, Amir Zjajo, and Guido Gronthoud European Test Symposium, page 45-50. IEEE Computer Society, (2009)
to dblp by dblp on Aug 27, 2010, 12:00 AM
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A low-power digitally-programmable variable gain amplifier in 65 nm CMOS.
Amir Zjajo, and Mingxin Song ISLPED, page 105-110. ACM, (2010)
to dblp by dblp on Aug 24, 2010, 12:00 AM
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RDE-based transistor-level gate simulation for statistical static timing analysis.
Qin Tang, Amir Zjajo, Michel Berkelaar, and Nick van der Meijs DAC, page 787-792. ACM, (2010)
to dblp by dblp on Aug 9, 2010, 12:00 AM
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Efficient Estimation of Die-Level Process Parameter Variations via the EM-Algorithm.
Amir Zjajo, Shaji Krishnan, and José Pineda de Gyvez DDECS, page 287-292. IEEE Computer Society, (2008)
to dblp by dblp on Sep 3, 2008, 12:00 AM
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Diagnostic Analysis of Static Errors in Multi-Step Analog to Digital Converters.
Amir Zjajo, and José Pineda de Gyvez DATE, page 74-79. IEEE, (2008)
to dblp by dblp on Aug 5, 2008, 12:00 AM
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Calibration and Debugging of Multi-step Analog to Digital Converters.
Amir Zjajo, and José Pineda de Gyvez DELTA, page 512-515. IEEE Computer Society, (2008)
to dblp by dblp on Feb 26, 2008, 12:00 AM
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Structural Fault Modeling and Fault Detection Through Neyman-Pearson Decision Criteria for Analog Integrated Circuits.
Amir Zjajo, José Pineda de Gyvez, and Guido Gronthoud J. Electronic Testing 22(4-6):399-409 (2006)
to dblp by dblp on Sep 18, 2007, 12:00 AM
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Interactive presentation: BIST method for die-level process parameter variation monitoring in analog/mixed-signal integrated circuits.
Amir Zjajo, Manuel J. Barragan Asian, and José Pineda de Gyvez DATE, page 1301-1306. ACM, (2007)
to dblp by dblp on Jun 22, 2007, 12:00 AM
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