@inproceedings{conf/fpt/FischaberHMW05,
	title = {FPGA Core Network Implementation and Optimization: A Case Study.},
	author = {Scott Fischaber and R. Hasson and John McAllister and Roger Woods},
	booktitle = {FPT},
	crossref = {conf/fpt/2005},
	editor = {Gordon J. Brebner and Samarjit Chakraborty and Weng-Fai Wong},
	pages = {319-320},
	publisher = {IEEE},
	url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2005.html#FischaberHMW05},
	year = {2005},
	biburl = {http://www.bibsonomy.org/bibtex/29e2eac3d275c923847f7f0f6e39ae442/dblp},
	description = {dblp},
	isbn = {0-7803-9407-0}, date = {2008-08-12},
	keywords = {dblp }
}

@article{journals/vlsisp/Brebner93,
	title = {Configurable array logic circuits for computing network error detection codes.},
	author = {Gordon J. Brebner},
	journal = {VLSI Signal Processing},
	number = {2},
	pages = {101-117},
	url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp6.html#Brebner93},
	volume = {6},
	year = {1993},
	biburl = {http://www.bibsonomy.org/bibtex/207bc7254f1e38cda628397602aa6149a/dblp},
	description = {dblp},
	ee = {http://dx.doi.org/10.1007/BF01607875}, date = {2008-08-07},
	keywords = {dblp }
}

@inproceedings{conf/fpl/AlbuKSMHCF01,
	title = {Implementation of (Normalised) RLS Lattice on Virtex.},
	author = {Felix Albu and Jiri Kadlec and Christopher I. Softley and Rudolf Matousek and Antonin Hermanek and Nick Coleman and Anthony Fagan},
	booktitle = {FPL},
	crossref = {conf/fpl/2001},
	editor = {Gordon J. Brebner and Roger Woods},
	pages = {91-100},
	publisher = {Springer},
	series = {Lecture Notes in Computer Science},
	url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2001.html#AlbuKSMHCF01},
	volume = {2147},
	year = {2001},
	biburl = {http://www.bibsonomy.org/bibtex/2d00b6ce946e9791197c323b36a3757b5/dblp},
	description = {dblp},
	date = {2008-06-05}, ee = {http://springerlink.metapress.com/openurl.asp?genre=article&issn=0302-9743&volume=2147&spage=0091}, isbn = {3-540-42499-7},
	keywords = {dblp }
}

@inproceedings{conf/icse/Brebner08,
	title = {Performance modeling for service oriented architectures.},
	author = {Paul Brebner},
	booktitle = {ICSE Companion},
	crossref = {conf/icse/2008c},
	editor = {Wilhelm Schäfer and Matthew B. Dwyer and Volker Gruhn},
	pages = {953-954},
	publisher = {ACM},
	url = {http://dblp.uni-trier.de/db/conf/icse/icsec2008.html#Brebner08},
	year = {2008},
	biburl = {http://www.bibsonomy.org/bibtex/29f92f5f3140cbec54bb4e8f6ebe83a21/dblp},
	description = {dblp},
	date = {2008-05-15}, ee = {http://doi.acm.org/10.1145/1370175.1370204}, isbn = {978-1-60558-079-1},
	keywords = {dblp }
}

@inproceedings{conf/dagstuhl/WehnVN06,
	title = {A Reconfigurable Outer Modem Platform for Future Communications Systems.},
	author = {Norbert Wehn and Timo Vogt and Christian Neeb},
	booktitle = {Dynamically Reconfigurable Architectures},
	crossref = {conf/dagstuhl/2006P6141},
	editor = {Peter M. Athanas and Jürgen Becker and Gordon J. Brebner and Jürgen Teich},
	publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany},
	series = {Dagstuhl Seminar Proceedings},
	url = {http://dblp.uni-trier.de/db/conf/dagstuhl/P6141.html#WehnVN06},
	volume = {06141},
	year = {2006},
	biburl = {http://www.bibsonomy.org/bibtex/26a16af460f6b4ca893cbe9f09c262e13/dblp},
	description = {dblp},
	date = {2008-05-14}, ee = {http://drops.dagstuhl.de/opus/volltexte/2006/730},
	keywords = {dblp }
}

@inproceedings{conf/dagstuhl/BeckerTBA06,
	title = {06141 Executive Summary -- Dynamically Reconfigurable Architectures.},
	author = {Jürgen Becker and Jürgen Teich and Gordon J. Brebner and Peter M. Athanas},
	booktitle = {Dynamically Reconfigurable Architectures},
	crossref = {conf/dagstuhl/2006P6141},
	editor = {Peter M. Athanas and Jürgen Becker and Gordon J. Brebner and Jürgen Teich},
	publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany},
	series = {Dagstuhl Seminar Proceedings},
	url = {http://dblp.uni-trier.de/db/conf/dagstuhl/P6141.html#BeckerTBA06},
	volume = {06141},
	year = {2006},
	biburl = {http://www.bibsonomy.org/bibtex/21ee4f905d27075035793ed0d8e112458/dblp},
	description = {dblp},
	date = {2008-05-14}, ee = {http://drops.dagstuhl.de/opus/volltexte/2006/837},
	keywords = {dblp }
}

@inproceedings{conf/dagstuhl/Stechele06,
	title = {Dynamically Reconfigurable Systems-on-Chip.},
	author = {Walter Stechele},
	booktitle = {Dynamically Reconfigurable Architectures},
	crossref = {conf/dagstuhl/2006P6141},
	editor = {Peter M. Athanas and Jürgen Becker and Gordon J. Brebner and Jürgen Teich},
	publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany},
	series = {Dagstuhl Seminar Proceedings},
	url = {http://dblp.uni-trier.de/db/conf/dagstuhl/P6141.html#Stechele06},
	volume = {06141},
	year = {2006},
	biburl = {http://www.bibsonomy.org/bibtex/2fe7f86023d90c261375c72a67ad9e209/dblp},
	description = {dblp},
	date = {2008-05-14}, ee = {http://drops.dagstuhl.de/opus/volltexte/2006/744},
	keywords = {dblp }
}

@inproceedings{conf/dagstuhl/BeckerHP06,
	title = {Physical 2D Morphware and Power Reduction Methods for Everyone.},
	author = {Jürgen Becker and Michael Hübner and Katarina Paulsson},
	booktitle = {Dynamically Reconfigurable Architectures},
	crossref = {conf/dagstuhl/2006P6141},
	editor = {Peter M. Athanas and Jürgen Becker and Gordon J. Brebner and Jürgen Teich},
	publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany},
	series = {Dagstuhl Seminar Proceedings},
	url = {http://dblp.uni-trier.de/db/conf/dagstuhl/P6141.html#BeckerHP06},
	volume = {06141},
	year = {2006},
	biburl = {http://www.bibsonomy.org/bibtex/2842b26f3367f2ab4959a5c28aeb02a34/dblp},
	description = {dblp},
	date = {2008-05-14}, ee = {http://drops.dagstuhl.de/opus/volltexte/2006/739},
	keywords = {dblp }
}

@inproceedings{conf/dagstuhl/Athanas06,
	title = {The (empty?) Promise of FPGA Supercomputing.},
	author = {Peter M. Athanas},
	booktitle = {Dynamically Reconfigurable Architectures},
	crossref = {conf/dagstuhl/2006P6141},
	editor = {Peter M. Athanas and Jürgen Becker and Gordon J. Brebner and Jürgen Teich},
	publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany},
	series = {Dagstuhl Seminar Proceedings},
	url = {http://dblp.uni-trier.de/db/conf/dagstuhl/P6141.html#Athanas06},
	volume = {06141},
	year = {2006},
	biburl = {http://www.bibsonomy.org/bibtex/249a71a8a9d1d61f9b56a0697e8c4ca94/dblp},
	description = {dblp},
	date = {2008-05-14}, ee = {http://drops.dagstuhl.de/opus/volltexte/2006/732},
	keywords = {dblp }
}

@inproceedings{conf/dagstuhl/VasarhelyiS06,
	title = {Analysis of Mojette Transform Implementation on Reconfigurable Hardware.},
	author = {József Vásárhelyi and Péter Serfözö},
	booktitle = {Dynamically Reconfigurable Architectures},
	crossref = {conf/dagstuhl/2006P6141},
	editor = {Peter M. Athanas and Jürgen Becker and Gordon J. Brebner and Jürgen Teich},
	publisher = {Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany},
	series = {Dagstuhl Seminar Proceedings},
	url = {http://dblp.uni-trier.de/db/conf/dagstuhl/P6141.html#VasarhelyiS06},
	volume = {06141},
	year = {2006},
	biburl = {http://www.bibsonomy.org/bibtex/2a6a636bc4bc5596e883b525a5b253250/dblp},
	description = {dblp},
	date = {2008-05-14}, ee = {http://drops.dagstuhl.de/opus/volltexte/2006/746},
	keywords = {dblp }
}