@inproceedings{conf/delta/RoussetBGLPV08, title = {Improving Diagnosis Resolution without Physical Information.}, author = {Alexandre Rousset and Alberto Bosio and Patrick Girard and Christian Landrault and Serge Pravossoudovitch and Arnaud Virazel}, booktitle = {DELTA}, crossref = {conf/delta/2008}, pages = {210-215}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/delta/delta2008.html#RoussetBGLPV08}, year = {2008}, biburl = {http://www.bibsonomy.org/bibtex/225c79f7c9bff15fb79475d01ee294bb1/dblp}, description = {dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2008.37}, date = {2008-02-26}, keywords = {dblp } } @inproceedings{conf/vlsi/BadereddineGPVL05, title = {Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles.}, author = {Nabil Badereddine and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel and Christian Landrault}, booktitle = {VLSI-SoC}, crossref = {conf/vlsi/2005soc}, editor = {Ricardo Augusto da Luz Reis and Adam Osseiran and Hans-Jörg Pfleiderer}, pages = {267-281}, publisher = {Springer}, series = {IFIP}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2005.html#BadereddineGPVL05}, volume = {240}, year = {2005}, biburl = {http://www.bibsonomy.org/bibtex/26c549b97ef4157515956e3de0d1f8f44/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/978-0-387-73661-7_17}, isbn = {978-0-387-73660-0}, date = {2007-11-07}, keywords = {dblp } } @article{journals/et/BonhommeGGLPV06, title = {A Gated Clock Scheme for Low Power Testing of Logic Cores.}, author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch and Arnaud Virazel}, journal = {J. Electronic Testing}, number = {1}, pages = {89-99}, url = {http://dblp.uni-trier.de/db/journals/et/et22.html#BonhommeGGLPV06}, volume = {22}, year = {2006}, biburl = {http://www.bibsonomy.org/bibtex/267cf0191e53b12c6d4796d8cc245bc98/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/s10836-006-6259-1}, date = {2007-09-18}, keywords = {dblp } } @inproceedings{conf/delta/BonhommeGGLPV04, title = {Design of Routing-Constrained Low Power Scan Chains.}, author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch and Arnaud Virazel}, booktitle = {DELTA}, crossref = {conf/delta/2004}, pages = {287-294}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/delta/delta2004.html#BonhommeGGLPV04}, year = {2004}, biburl = {http://www.bibsonomy.org/bibtex/2e2651de09a41072034f37a837f1b892d/dblp}, description = {dblp}, ee = {http://csdl.computer.org/comp/proceedings/delta/2004/2081/00/20810287abs.htm}, isbn = {0-7695-2081-2}, date = {2007-07-27}, keywords = {dblp } } @inproceedings{conf/delta/BonhommeGLP02, title = {Test Power: a Big Issue in Large SOC Designs.}, author = {Yannick Bonhomme and Patrick Girard and Christian Landrault and Serge Pravossoudovitch}, booktitle = {DELTA}, crossref = {conf/delta/2002}, pages = {447-449}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/delta/delta2002.html#BonhommeGLP02}, year = {2002}, biburl = {http://www.bibsonomy.org/bibtex/2a3df516c3dc074bb594ba94dfa4d3892/dblp}, description = {dblp}, ee = {http://csdl.computer.org/comp/proceedings/delta/2002/1453/00/14530447abs.htm}, isbn = {0-7695-1453-7}, date = {2007-07-27}, keywords = {dblp } } @inproceedings{conf/iolts/BonhommeGGLP01, title = {A Gated Clock Scheme for Low Power Scan-Based BIST.}, author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch}, booktitle = {IOLTW}, crossref = {conf/iolts/2001}, pages = {87-89}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/iolts/ioltw2001.html#BonhommeGGLP01}, year = {2001}, biburl = {http://www.bibsonomy.org/bibtex/2aade4501453687b6515bfe8fe60d404e/dblp}, description = {dblp}, ee = {http://csdl.computer.org/comp/proceedings/ioltw/2001/1290/00/12900087abs.htm}, isbn = {0-7695-1290-9}, date = {2007-07-27}, keywords = {dblp } } @inproceedings{conf/itc/BonhommeGGLP03, title = {Efficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint.}, author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch}, booktitle = {ITC}, crossref = {conf/itc/2003}, pages = {488-493}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/itc/itc2003.html#BonhommeGGLP03}, year = {2003}, biburl = {http://www.bibsonomy.org/bibtex/29977707f60453ff61df60f4094d66ec3/dblp}, description = {dblp}, ee = {http://csdl.computer.org/comp/proceedings/itc/2003/2063/00/20630488abs.htm}, isbn = {0-7803-8106-8}, date = {2007-07-27}, keywords = {dblp } } @inproceedings{conf/date/BonhommeGGLPV04, title = {Design of Routing-Constrained Low Power Scan Chains.}, author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch and Arnaud Virazel}, booktitle = {DATE}, crossref = {conf/date/2004}, pages = {62-67}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/date/date2004-1.html#BonhommeGGLPV04}, year = {2004}, biburl = {http://www.bibsonomy.org/bibtex/2c89517b8c739a3989352f3978d40a45a/dblp}, description = {dblp}, ee = {http://csdl.computer.org/comp/proceedings/date/2004/2085/01/208510062abs.htm}, isbn = {0-7695-2085-5}, date = {2007-07-27}, keywords = {dblp } } @inproceedings{conf/ats/BonhommeGGLP01, title = {A Gated Clock Scheme for Low Power Scan Testing of Logic ICs or Embedded Cores.}, author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch}, booktitle = {Asian Test Symposium}, crossref = {conf/ats/2001}, pages = {253-258}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/ats/ats2001.html#BonhommeGGLP01}, year = {2001}, biburl = {http://www.bibsonomy.org/bibtex/2d9c60c31f3d8623009a3c011c62ea4b2/dblp}, description = {dblp}, ee = {http://csdl.computer.org/comp/proceedings/ats/2001/1378/00/13780253abs.htm}, isbn = {0-7695-1378-6}, date = {2007-07-27}, keywords = {dblp } } @inproceedings{conf/itc/BonhommeGLP02, title = {Power Driven Chaining of Flip-Flops in Scan Architectures.}, author = {Yannick Bonhomme and Patrick Girard and Christian Landrault and Serge Pravossoudovitch}, booktitle = {ITC}, crossref = {conf/itc/2002}, pages = {796-803}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/itc/itc2002.html#BonhommeGLP02}, year = {2002}, biburl = {http://www.bibsonomy.org/bibtex/2a67205dd1396e3049f03c56147c4e725/dblp}, description = {dblp}, ee = {http://csdl.computer.org/comp/proceedings/itc/2002/7543/00/75430796abs.htm}, date = {2007-07-27}, keywords = {dblp } }