@inproceedings{conf/ddecs/BosioGPB08, title = {SoC Symbolic Simulation: a case study on delay fault testing.}, author = {Alberto Bosio and Patrick Girard and Serge Pravossoudovitch and Paolo Bernardi}, booktitle = {DDECS}, crossref = {conf/ddecs/2008}, editor = {Bernd Straube and Milos Drutarovský and Michel Renovell and Peter Gramata and Mária Fischerová}, pages = {320-325}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/ddecs/ddecs2008.html#BosioGPB08}, year = {2008}, biburl = {http://www.bibsonomy.org/bibtex/2e4e3b4d443b5b25105ce4d58a92631cd/dblp}, description = {dblp}, date = {2008-09-03}, ee = {http://dx.doi.org/10.1109/DDECS.2008.4538810}, isbn = {978-1-4244-2276-0}, keywords = {dblp } } @inproceedings{conf/vts/NeyGPVBG08, title = {An SRAM Design-for-Diagnosis Solution Based on Write Driver Voltage Sensing.}, author = {A. Ney and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel and Magali Bastian and V. Gouin}, booktitle = {VTS}, crossref = {conf/vts/2008}, pages = {89-94}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/vts/vts2008.html#NeyGPVBG08}, year = {2008}, biburl = {http://www.bibsonomy.org/bibtex/297025f4525e9a18a02bb3ac55c69910a/dblp}, description = {dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/VTS.2008.17}, date = {2008-05-07}, keywords = {dblp } } @article{journals/et/DililloGPVB07, title = {Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits.}, author = {Luigi Dilillo and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel and Magali Bastian}, journal = {J. Electronic Testing}, number = {5}, pages = {435-444}, url = {http://dblp.uni-trier.de/db/journals/et/et23.html#DililloGPVB07}, volume = {23}, year = {2007}, biburl = {http://www.bibsonomy.org/bibtex/2aaeaefee1f7d740a1bb6aff902c5943b/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/s10836-007-5003-9}, date = {2008-03-11}, keywords = {dblp } } @inproceedings{conf/delta/RoussetBGLPV08, title = {Improving Diagnosis Resolution without Physical Information.}, author = {Alexandre Rousset and Alberto Bosio and Patrick Girard and Christian Landrault and Serge Pravossoudovitch and Arnaud Virazel}, booktitle = {DELTA}, crossref = {conf/delta/2008}, pages = {210-215}, publisher = {IEEE Computer Society}, url = {http://dblp.uni-trier.de/db/conf/delta/delta2008.html#RoussetBGLPV08}, year = {2008}, biburl = {http://www.bibsonomy.org/bibtex/225c79f7c9bff15fb79475d01ee294bb1/dblp}, description = {dblp}, ee = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2008.37}, date = {2008-02-26}, keywords = {dblp } } @inproceedings{conf/vlsi/BadereddineGPVL05, title = {Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles.}, author = {Nabil Badereddine and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel and Christian Landrault}, booktitle = {VLSI-SoC}, crossref = {conf/vlsi/2005soc}, editor = {Ricardo Augusto da Luz Reis and Adam Osseiran and Hans-Jörg Pfleiderer}, pages = {267-281}, publisher = {Springer}, series = {IFIP}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2005.html#BadereddineGPVL05}, volume = {240}, year = {2005}, biburl = {http://www.bibsonomy.org/bibtex/26c549b97ef4157515956e3de0d1f8f44/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/978-0-387-73661-7_17}, isbn = {978-0-387-73660-0}, date = {2007-11-07}, keywords = {dblp } } @article{journals/et/GirardHPR06, title = {An Efficient BIST Architecture for Delay Faults in the Logic Cells of Symmetrical SRAM-Based FPGAs.}, author = {Patrick Girard and Olivier Héron and Serge Pravossoudovitch and Michel Renovell}, journal = {J. Electronic Testing}, number = {2}, pages = {161-172}, url = {http://dblp.uni-trier.de/db/journals/et/et22.html#GirardHPR06}, volume = {22}, year = {2006}, biburl = {http://www.bibsonomy.org/bibtex/24d58bea29dde8f95ded51703b2a4a15a/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/s10836-005-4631-1}, date = {2007-09-18}, keywords = {dblp } } @article{journals/et/DililloGPVBH06, title = {ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions.}, author = {Luigi Dilillo and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel and Simone Borri and Magali Bastian Hage-Hassan}, journal = {J. Electronic Testing}, number = {3}, pages = {287-296}, url = {http://dblp.uni-trier.de/db/journals/et/et22.html#DililloGPVBH06}, volume = {22}, year = {2006}, biburl = {http://www.bibsonomy.org/bibtex/254a4f5a32b57ebdc2d15e5160dc4e3af/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/s10836-006-7761-1}, date = {2007-09-18}, keywords = {dblp } } @article{journals/et/BonhommeGGLPV06, title = {A Gated Clock Scheme for Low Power Testing of Logic Cores.}, author = {Yannick Bonhomme and Patrick Girard and Loïs Guiller and Christian Landrault and Serge Pravossoudovitch and Arnaud Virazel}, journal = {J. Electronic Testing}, number = {1}, pages = {89-99}, url = {http://dblp.uni-trier.de/db/journals/et/et22.html#BonhommeGGLPV06}, volume = {22}, year = {2006}, biburl = {http://www.bibsonomy.org/bibtex/267cf0191e53b12c6d4796d8cc245bc98/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/s10836-006-6259-1}, date = {2007-09-18}, keywords = {dblp } } @article{journals/et/BorriHDGPV05, title = {Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test.}, author = {Simone Borri and Magali Bastian Hage-Hassan and Luigi Dilillo and Patrick Girard and Serge Pravossoudovitch and Arnaud Virazel}, journal = {J. Electronic Testing}, number = {2}, pages = {169-179}, url = {http://dblp.uni-trier.de/db/journals/et/et21.html#BorriHDGPV05}, volume = {21}, year = {2005}, biburl = {http://www.bibsonomy.org/bibtex/2c0a88e92fc09693dedaeb8195f6789ba/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/s10836-005-6146-1}, date = {2007-09-18}, keywords = {dblp } } @article{journals/et/GirardHPR05, title = {Delay Fault Testing of Look-Up Tables in SRAM-Based FPGAs.}, author = {Patrick Girard and Olivier Héron and Serge Pravossoudovitch and Michel Renovell}, journal = {J. Electronic Testing}, number = {1}, pages = {43-55}, url = {http://dblp.uni-trier.de/db/journals/et/et21.html#GirardHPR05}, volume = {21}, year = {2005}, biburl = {http://www.bibsonomy.org/bibtex/2c8d146e8f0a8de61c29ba28d1e6f6703/dblp}, description = {dblp}, ee = {http://dx.doi.org/10.1007/s10836-005-5286-7}, date = {2007-09-18}, keywords = {dblp } }