@inproceedings{conf/aPcsac/OzerB07,
  added-at = {2007-08-23T00:00:00.000+0200},
  author = {Özer, Emre and Biles, Stuart},
  biburl = {http://www.bibsonomy.org/bibtex/225cac1902f8cf29f8d950edeb8103995/dblp},
  booktitle = {Asia-Pacific Computer Systems Architecture Conference},
  crossref = {conf/aPcsac/2007},
  date = {2007-08-23},
  description = {dblp},
  editor = {Choi, Lynn and Paek, Yunheung and Cho, Sangyeun},
  ee = {http://dx.doi.org/10.1007/978-3-540-74309-5_35},
  interhash = {3ddd1ab59da1c816bb70f7605b8d0d4b},
  intrahash = {25cac1902f8cf29f8d950edeb8103995},
  isbn = {978-3-540-74308-8},
  keywords = {dblp},
  pages = {376-386},
  publisher = {Springer},
  series = {Lecture Notes in Computer Science},
  timestamp = {2007-08-23T00:00:00.000+0200},
  title = {Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor.},
  url = {http://dblp.uni-trier.de/db/conf/aPcsac/aPcsac2007.html#OzerB07},
  volume = 4697,
  year = 2007
}