%0 Journal Article %1 journals/mr/WangSDWC15 %A Wang, Ying %A Shan, Chan %A Dou, Zheng %A Wang, Liguo %A Cao, Fei %D 2015 %J Microelectron. Reliab. %K dblp %N 2 %P 318-325 %T Improved performance of nanoscale junctionless transistor based on gate engineering approach. %U http://dblp.uni-trier.de/db/journals/mr/mr55.html#WangSDWC15 %V 55

@article{journals/mr/WangSDWC15, added-at = {2023-02-18T00:00:00.000+0100}, author = {Wang, Ying and Shan, Chan and Dou, Zheng and Wang, Liguo and Cao, Fei}, biburl = {https://www.bibsonomy.org/bibtex/243c87c10950e14f48be8779e61316d44/dblp}, ee = {https://doi.org/10.1016/j.microrel.2014.11.009}, interhash = {0104646c7a5b88ddd07e17566afdd4ad}, intrahash = {43c87c10950e14f48be8779e61316d44}, journal = {Microelectron. Reliab.}, keywords = {dblp}, number = 2, pages = {318-325}, timestamp = {2024-04-09T02:50:44.000+0200}, title = {Improved performance of nanoscale junctionless transistor based on gate engineering approach.}, url = {http://dblp.uni-trier.de/db/journals/mr/mr55.html#WangSDWC15}, volume = 55, year = 2015 }