%0 Journal Article %1 journals/tcad/VaishnavP99 %A Vaishnav, Hirendu %A Pedram, Massoud %D 1999 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 6 %P 799-812 %T Delay-optimal clustering targeting low-power VLSI circuits. %U http://dblp.uni-trier.de/db/journals/tcad/tcad18.html#VaishnavP99 %V 18

@article{journals/tcad/VaishnavP99, added-at = {2020-09-24T00:00:00.000+0200}, author = {Vaishnav, Hirendu and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/298921bb51c660a32d5f8f712c39777a0/dblp}, ee = {https://doi.org/10.1109/43.766729}, interhash = {057927cf1443f128abfff666dd5f7069}, intrahash = {98921bb51c660a32d5f8f712c39777a0}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 6, pages = {799-812}, timestamp = {2020-09-25T11:48:15.000+0200}, title = {Delay-optimal clustering targeting low-power VLSI circuits.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad18.html#VaishnavP99}, volume = 18, year = 1999 }