%0 Journal Article %1 journals/jssc/ShahramianC15 %A Shahramian, Shayan %A Carusone, Anthony Chan %D 2015 %J IEEE J. Solid State Circuits %K dblp %N 7 %P 1722-1735 %T A 0.41 pJ/Bit 10 Gb/s Hybrid 2 IIR and 1 Discrete-Time DFE Tap in 28 nm-LP CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#ShahramianC15 %V 50

@article{journals/jssc/ShahramianC15, added-at = {2020-08-30T00:00:00.000+0200}, author = {Shahramian, Shayan and Carusone, Anthony Chan}, biburl = {https://www.bibsonomy.org/bibtex/2dda79e347b24cb10bafe86b0498247be/dblp}, ee = {https://doi.org/10.1109/JSSC.2015.2402218}, interhash = {08f865a7632fcd66fd2abdc49e989160}, intrahash = {dda79e347b24cb10bafe86b0498247be}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 7, pages = {1722-1735}, timestamp = {2020-08-31T11:41:29.000+0200}, title = {A 0.41 pJ/Bit 10 Gb/s Hybrid 2 IIR and 1 Discrete-Time DFE Tap in 28 nm-LP CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#ShahramianC15}, volume = 50, year = 2015 }