%0 Journal Article %1 journals/taco/LiangZM14 %A Liang, Zhibin %A Zhang, Wei %A Ma, Yung-Cheng %D 2014 %J ACM Trans. Archit. Code Optim. %K dblp %N 2 %P 20:1-20:26 %T Deadline-Constrained Clustered Scheduling for VLIW Architectures using Power-Gated Register Files. %U http://dblp.uni-trier.de/db/journals/taco/taco11.html#LiangZM14 %V 11

@article{journals/taco/LiangZM14, added-at = {2021-02-17T00:00:00.000+0100}, author = {Liang, Zhibin and Zhang, Wei and Ma, Yung-Cheng}, biburl = {https://www.bibsonomy.org/bibtex/2118bd6c67a992f4276888c2d68577e53/dblp}, ee = {https://doi.org/10.1145/2632218}, interhash = {0c26021c748b93e67cb7c030c60c2d6d}, intrahash = {118bd6c67a992f4276888c2d68577e53}, journal = {ACM Trans. Archit. Code Optim.}, keywords = {dblp}, number = 2, pages = {20:1-20:26}, timestamp = {2024-04-08T20:06:34.000+0200}, title = {Deadline-Constrained Clustered Scheduling for VLIW Architectures using Power-Gated Register Files.}, url = {http://dblp.uni-trier.de/db/journals/taco/taco11.html#LiangZM14}, volume = 11, year = 2014 }