%0 Journal Article %1 journals/tvlsi/RadulovQR15a %A Radulov, Georgi I. %A Quinn, Patrick J. %A van Roermund, Arthur H. M. %D 2015 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 9 %P 1941-1945 %T A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR >50 dB Up to 1 GHz. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#RadulovQR15a %V 23

@article{journals/tvlsi/RadulovQR15a, added-at = {2020-03-11T00:00:00.000+0100}, author = {Radulov, Georgi I. and Quinn, Patrick J. and van Roermund, Arthur H. M.}, biburl = {https://www.bibsonomy.org/bibtex/25197b9521a593ea8724264285083b388/dblp}, ee = {https://doi.org/10.1109/TVLSI.2014.2350540}, interhash = {13b4b0449b318a00a7c74b4df3002cff}, intrahash = {5197b9521a593ea8724264285083b388}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 9, pages = {1941-1945}, timestamp = {2020-03-12T11:42:31.000+0100}, title = {A 28-nm CMOS 7-GS/s 6-bit DAC With DfT Clock and Memory Reaching SFDR >50 dB Up to 1 GHz.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi23.html#RadulovQR15a}, volume = 23, year = 2015 }