%0 Conference Paper %1 conf/vlsid/AgarwalB09 %A Agarwal, Ghasi %A Bare, Prakash %B VLSI Design %D 2009 %I IEEE Computer Society %K dblp %P 17 %T Why is Design Automation and Reuse of Analog Designs Increasingly Trailing the Digital World? %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#AgarwalB09 %@ 978-0-7695-3506-7

@inproceedings{conf/vlsid/AgarwalB09, added-at = {2023-03-24T00:00:00.000+0100}, author = {Agarwal, Ghasi and Bare, Prakash}, biburl = {https://www.bibsonomy.org/bibtex/28bf3c96c56138118afc6b1d174a65c67/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2009.107}, interhash = {16a71e176fa290c0d2e6ef70599d4327}, intrahash = {8bf3c96c56138118afc6b1d174a65c67}, isbn = {978-0-7695-3506-7}, keywords = {dblp}, pages = 17, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:34.000+0200}, title = {Why is Design Automation and Reuse of Analog Designs Increasingly Trailing the Digital World?}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#AgarwalB09}, year = 2009 }