%0 Journal Article %1 IJACSA.2011.020408 %A Rajdeep Chakraborty JK Mandal, Professor %D 2011 %J International Journal of Advanced Computer Science and Applications(IJACSA) %K Block Cipher, Cryptography, FPGA, Key, Private RTL, Session Symmetric/Private and cryptosystem.,VHDL key %N 4 %T FPGA Based Cipher Design & Implementation of Recursive Oriented Block Arithmetic and Substitution Technique (ROBAST) %U http://ijacsa.thesai.org/ %V 2 %X Proposed FPGA based technique considers a message as a binary string on which ROBAST is applied. A block of n-bits is taken as an input stream, where n ranges from 8 to 256 – bit, then ROBAST is applied in each block to generate intermediate stream, any one intermediate stream is considered as a cipher text. The same operation is performed repeatedly on various block sizes. It is a kind of block cipher and symmetric in nature hence decoding is done in similar manner. This paper also presents an efficient hardware realization of the proposed technique using state-of-the-art Field Programmable Gate Array (FPGA). The technique is also coded in C programming language and Very High Speed Integrated Circuit Hardware Description Language (VHDL). Various results and comparisons have been performed against industrially accepted RSA and TDES. A satisfactory results and comparisons are found.

@article{IJACSA.2011.020408, abstract = {Proposed FPGA based technique considers a message as a binary string on which ROBAST is applied. A block of n-bits is taken as an input stream, where n ranges from 8 to 256 – bit, then ROBAST is applied in each block to generate intermediate stream, any one intermediate stream is considered as a cipher text. The same operation is performed repeatedly on various block sizes. It is a kind of block cipher and symmetric in nature hence decoding is done in similar manner. This paper also presents an efficient hardware realization of the proposed technique using state-of-the-art Field Programmable Gate Array (FPGA). The technique is also coded in C programming language and Very High Speed Integrated Circuit Hardware Description Language (VHDL). Various results and comparisons have been performed against industrially accepted RSA and TDES. A satisfactory results and comparisons are found.}, added-at = {2014-02-21T08:00:08.000+0100}, author = {{Rajdeep Chakraborty JK Mandal}, Professor}, biburl = {https://www.bibsonomy.org/bibtex/2aaaedcaf0c5eefe25044c8608b771021/thesaiorg}, interhash = {286448bab2e9bd5eb821ea284c476f32}, intrahash = {aaaedcaf0c5eefe25044c8608b771021}, journal = {International Journal of Advanced Computer Science and Applications(IJACSA)}, keywords = {Block Cipher, Cryptography, FPGA, Key, Private RTL, Session Symmetric/Private and cryptosystem.,VHDL key}, number = 4, timestamp = {2014-02-21T08:00:08.000+0100}, title = {{FPGA Based Cipher Design \& Implementation of Recursive Oriented Block Arithmetic and Substitution Technique (ROBAST)}}, url = {http://ijacsa.thesai.org/}, volume = 2, year = 2011 }