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%0 Conference Paper
%1 conf/itc/PomeranzSRKL96
%A Pomeranz, Irith
%A Saxena, Nirmal R.
%A Reeve, Richard
%A Kulkarni, Paritosh
%A Li, Yan A.
%B ITC
%D 1996
%I IEEE Computer Society
%K dblp
%P 904-913
%T Generation of Test Cases for Hardware Design Verification of a Super-Scalar Fetch Processor.
%U http://dblp.uni-trier.de/db/conf/itc/itc1996.html#PomeranzSRKL96
%@ 0-7803-3541-4
@inproceedings{conf/itc/PomeranzSRKL96,
added-at = {2023-03-23T00:00:00.000+0100},
author = {Pomeranz, Irith and Saxena, Nirmal R. and Reeve, Richard and Kulkarni, Paritosh and Li, Yan A.},
biburl = {https://www.bibsonomy.org/bibtex/21a23a9596d84a1525c287fe6d36697a0/dblp},
booktitle = {ITC},
crossref = {conf/itc/1996},
ee = {https://doi.ieeecomputersociety.org/10.1109/TEST.1996.557152},
interhash = {368f6a3ffd9c3b2a105fbc5588348e25},
intrahash = {1a23a9596d84a1525c287fe6d36697a0},
isbn = {0-7803-3541-4},
keywords = {dblp},
pages = {904-913},
publisher = {IEEE Computer Society},
timestamp = {2024-04-10T19:52:20.000+0200},
title = {Generation of Test Cases for Hardware Design Verification of a Super-Scalar Fetch Processor.},
url = {http://dblp.uni-trier.de/db/conf/itc/itc1996.html#PomeranzSRKL96},
year = 1996
}