%0 Journal Article %1 journals/jssc/ChenAKSMHAKDB15 %A Chen, Gregory K. %A Anders, Mark A. %A Kaul, Himanshu %A Satpathy, Sudhir %A Mathew, Sanu K. %A Hsu, Steven %A Agarwal, Amit %A Krishnamurthy, Ram %A De, Vivek %A Borkar, Shekhar %D 2015 %J IEEE J. Solid State Circuits %K dblp %N 1 %P 59-67 %T A 340 mV-to-0.9 V 20.2 Tb/s Source-Synchronous Hybrid Packet/Circuit-Switched 16 × 16 Network-on-Chip in 22 nm Tri-Gate CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#ChenAKSMHAKDB15 %V 50

@article{journals/jssc/ChenAKSMHAKDB15, added-at = {2022-02-25T00:00:00.000+0100}, author = {Chen, Gregory K. and Anders, Mark A. and Kaul, Himanshu and Satpathy, Sudhir and Mathew, Sanu K. and Hsu, Steven and Agarwal, Amit and Krishnamurthy, Ram and De, Vivek and Borkar, Shekhar}, biburl = {https://www.bibsonomy.org/bibtex/23e7e4ff546608fe5430569b0ab4b81c2/dblp}, ee = {https://doi.org/10.1109/JSSC.2014.2369508}, interhash = {3753980feae4a07ffb4aeefdca7caa1a}, intrahash = {3e7e4ff546608fe5430569b0ab4b81c2}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 1, pages = {59-67}, timestamp = {2024-04-08T10:43:27.000+0200}, title = {A 340 mV-to-0.9 V 20.2 Tb/s Source-Synchronous Hybrid Packet/Circuit-Switched 16 × 16 Network-on-Chip in 22 nm Tri-Gate CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#ChenAKSMHAKDB15}, volume = 50, year = 2015 }