%0 Journal Article %1 journals/jcsc/ChandaDS15 %A Chanda, Manash %A De, Swapnadip %A Sarkar, Chandan Kumar %D 2015 %J J. Circuits Syst. Comput. %K dblp %N 10 %P 1550160:1-1550160:20 %T Design and Analysis of 32-Bit CLA Using Energy Efficient Adiabatic Logic for Ultra-Low-Power Application. %U http://dblp.uni-trier.de/db/journals/jcsc/jcsc24.html#ChandaDS15 %V 24

@article{journals/jcsc/ChandaDS15, added-at = {2022-10-02T00:00:00.000+0200}, author = {Chanda, Manash and De, Swapnadip and Sarkar, Chandan Kumar}, biburl = {https://www.bibsonomy.org/bibtex/299f7d15e18fefa5534ec8264944c5030/dblp}, ee = {https://doi.org/10.1142/S0218126615501601}, interhash = {3a6a015b8f835e3ab8ddc543c8f49db8}, intrahash = {99f7d15e18fefa5534ec8264944c5030}, journal = {J. Circuits Syst. Comput.}, keywords = {dblp}, number = 10, pages = {1550160:1-1550160:20}, timestamp = {2024-04-08T19:36:09.000+0200}, title = {Design and Analysis of 32-Bit CLA Using Energy Efficient Adiabatic Logic for Ultra-Low-Power Application.}, url = {http://dblp.uni-trier.de/db/journals/jcsc/jcsc24.html#ChandaDS15}, volume = 24, year = 2015 }