%0 Conference Paper %1 conf/fpl/ShafiqPNA10 %A Shafiq, Muhammad %A Pericàs, Miquel %A Navarro, Nacho %A Ayguadé, Eduard %B FPL %D 2010 %I IEEE Computer Society %K dblp %P 568-573 %T FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2010.html#ShafiqPNA10 %@ 978-0-7695-4179-2

@inproceedings{conf/fpl/ShafiqPNA10, added-at = {2024-03-26T00:00:00.000+0100}, author = {Shafiq, Muhammad and Pericàs, Miquel and Navarro, Nacho and Ayguadé, Eduard}, biburl = {https://www.bibsonomy.org/bibtex/2e969d5d5c770a4c3f3fbc22cf2bb81c6/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2010}, ee = {https://www.wikidata.org/entity/Q61735454}, interhash = {4af67e56f8ea6b837e71167bc7b92005}, intrahash = {e969d5d5c770a4c3f3fbc22cf2bb81c6}, isbn = {978-0-7695-4179-2}, keywords = {dblp}, pages = {568-573}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:51:28.000+0200}, title = {FEM: A Step Towards a Common Memory Layout for FPGA Based Accelerators.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2010.html#ShafiqPNA10}, year = 2010 }