%0 Journal Article %1 journals/jssc/ShuCSTAEEH16 %A Shu, Guanghua %A Choi, Woo-Seok %A Saxena, Saurabh %A Talegaonkar, Mrunmay %A Anand, Tejasvi %A Elkholy, Ahmed %A Elshazly, Amr %A Hanumolu, Pavan Kumar %D 2016 %J IEEE J. Solid State Circuits %K dblp %N 2 %P 428-439 %T A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition. %U http://dblp.uni-trier.de/db/journals/jssc/jssc51.html#ShuCSTAEEH16 %V 51

@article{journals/jssc/ShuCSTAEEH16, added-at = {2020-08-30T00:00:00.000+0200}, author = {Shu, Guanghua and Choi, Woo-Seok and Saxena, Saurabh and Talegaonkar, Mrunmay and Anand, Tejasvi and Elkholy, Ahmed and Elshazly, Amr and Hanumolu, Pavan Kumar}, biburl = {https://www.bibsonomy.org/bibtex/24e2e9b2451edcd1a91016ce500631e4d/dblp}, ee = {https://doi.org/10.1109/JSSC.2015.2497963}, interhash = {4b5c656ba58b3b93b625642237c817bd}, intrahash = {4e2e9b2451edcd1a91016ce500631e4d}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 2, pages = {428-439}, timestamp = {2020-08-31T11:42:04.000+0200}, title = {A 4-to-10.5 Gb/s Continuous-Rate Digital Clock and Data Recovery With Automatic Frequency Acquisition.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc51.html#ShuCSTAEEH16}, volume = 51, year = 2016 }