%0 Journal Article %1 journals/iet-cds/PradhanS16 %A Pradhan, Kumar Prasannajit %A Sahu, Prasanna Kumar %D 2016 %J IET Circuits Devices Syst. %K dblp %N 5 %P 441-447 %T Benefits of asymmetric underlap dual-k spacer hybrid fin field-effect transistor over bulk fin field-effect transistor. %U http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds10.html#PradhanS16 %V 10

@article{journals/iet-cds/PradhanS16, added-at = {2020-09-10T00:00:00.000+0200}, author = {Pradhan, Kumar Prasannajit and Sahu, Prasanna Kumar}, biburl = {https://www.bibsonomy.org/bibtex/2b162383895fbc0d7f6e944a5741555fe/dblp}, ee = {https://doi.org/10.1049/iet-cds.2016.0125}, interhash = {61aeada75ad67d3fe736503657675162}, intrahash = {b162383895fbc0d7f6e944a5741555fe}, journal = {IET Circuits Devices Syst.}, keywords = {dblp}, number = 5, pages = {441-447}, timestamp = {2020-09-11T11:44:01.000+0200}, title = {Benefits of asymmetric underlap dual-k spacer hybrid fin field-effect transistor over bulk fin field-effect transistor.}, url = {http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds10.html#PradhanS16}, volume = 10, year = 2016 }