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%0 Conference Paper
%1 conf/fpga/HungLSCL15
%A Hung, Eddie
%A Levine, Joshua M.
%A Stott, Edward A.
%A Constantinides, George A.
%A Luk, Wayne
%B FPGA
%D 2015
%E Constantinides, George A.
%E Chen, Deming
%I ACM
%K dblp
%P 56-65
%T Delay-Bounded Routing for Shadow Registers.
%U http://dblp.uni-trier.de/db/conf/fpga/fpga2015.html#HungLSCL15
%@ 978-1-4503-3315-3
@inproceedings{conf/fpga/HungLSCL15,
added-at = {2018-11-06T00:00:00.000+0100},
author = {Hung, Eddie and Levine, Joshua M. and Stott, Edward A. and Constantinides, George A. and Luk, Wayne},
biburl = {https://www.bibsonomy.org/bibtex/26229801f6fdb93c817dc05f2ce43f3f0/dblp},
booktitle = {FPGA},
crossref = {conf/fpga/2015},
editor = {Constantinides, George A. and Chen, Deming},
ee = {https://doi.org/10.1145/2684746.2689075},
interhash = {629b4a7ea4be0c5e5add97274d92fda1},
intrahash = {6229801f6fdb93c817dc05f2ce43f3f0},
isbn = {978-1-4503-3315-3},
keywords = {dblp},
pages = {56-65},
publisher = {ACM},
timestamp = {2018-11-07T12:47:46.000+0100},
title = {Delay-Bounded Routing for Shadow Registers.},
url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2015.html#HungLSCL15},
year = 2015
}