%0 Conference Paper %1 conf/iscas/DinhMT99 %A Dinh, A. %A Mason, R. %A Toth, J. %B ISCAS (4) %D 1999 %I IEEE %K dblp %P 295-298 %T High speed V.32 trellis encoder/decoder implementation using FPGA. %U http://dblp.uni-trier.de/db/conf/iscas/iscas1999-4.html#DinhMT99 %@ 0-7803-5471-0

@inproceedings{conf/iscas/DinhMT99, added-at = {2016-05-20T00:00:00.000+0200}, author = {Dinh, A. and Mason, R. and Toth, J.}, biburl = {https://www.bibsonomy.org/bibtex/2654143d690ed514f822ce1163e87fbf3/dblp}, booktitle = {ISCAS (4)}, crossref = {conf/iscas/1999}, ee = {http://dx.doi.org/10.1109/ISCAS.1999.780000}, interhash = {1779d18eacfdd3a7e887b967965ed6fd}, intrahash = {654143d690ed514f822ce1163e87fbf3}, isbn = {0-7803-5471-0}, keywords = {dblp}, pages = {295-298}, publisher = {IEEE}, timestamp = {2016-05-21T11:38:50.000+0200}, title = {High speed V.32 trellis encoder/decoder implementation using FPGA.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1999-4.html#DinhMT99}, year = 1999 }