%0 Journal Article %1 ashokagarwal2013implementation %A Ashok Agarwal, B. Lakshmi %D 2013 %E Hope, Dr.Martin %J Int. J. on Recent Trends in Engineering and Technology, %K CIC CORDIC DDC FPGAs Filte SRC %N 1 %P 6 %T FPGA Implementation of Optimized CIC Filter for Sample Rate Conversion in Software Radio Receiver %U http://searchdl.org/public/journals/2013/IJRTET/9/1/522.pdf %V 9 %X A software radio receiver is one which is tuned to receive a transmitted signal on multiple communication standards through software rather than hardware. To incorporate multi-standard radio communications an intermediate frequency of high ranges is used. Such high intermediate frequencies when sampled with Nyquist rate gets oversampled due to the phenomenon of Band Pass sampling depending on the radio communication standard. Hence a digital down converter (DDC) capable of reducing the sampling rate in accordance with the radio communication standard is required. Cascaded Integrated Comb (CIC) filters are used for large sample rate conversion factors. In this paper an optimized architecture for DDC employing CORDIC in the mixer stage and the reconfigurable decimation factors for CIC filters has been implemented. Optimized implementation of CIC filter for sample rate conversion of multi-standard radio communications reduces the hardware resources by more than twenty percent when compared with the non-optimized architecture.

@article{ashokagarwal2013implementation, abstract = { A software radio receiver is one which is tuned to receive a transmitted signal on multiple communication standards through software rather than hardware. To incorporate multi-standard radio communications an intermediate frequency of high ranges is used. Such high intermediate frequencies when sampled with Nyquist rate gets oversampled due to the phenomenon of Band Pass sampling depending on the radio communication standard. Hence a digital down converter (DDC) capable of reducing the sampling rate in accordance with the radio communication standard is required. Cascaded Integrated Comb (CIC) filters are used for large sample rate conversion factors. In this paper an optimized architecture for DDC employing CORDIC in the mixer stage and the reconfigurable decimation factors for CIC filters has been implemented. Optimized implementation of CIC filter for sample rate conversion of multi-standard radio communications reduces the hardware resources by more than twenty percent when compared with the non-optimized architecture.}, added-at = {2014-02-03T06:16:40.000+0100}, author = {Ashok Agarwal, B. Lakshmi}, biburl = {https://www.bibsonomy.org/bibtex/2f1de7207a6c0eca4e55d739d57d62b17/idescitation}, editor = {Hope, Dr.Martin}, interhash = {17f2cad66806db9c6e7e033a1a24e35c}, intrahash = {f1de7207a6c0eca4e55d739d57d62b17}, journal = {Int. J. on Recent Trends in Engineering and Technology,}, keywords = {CIC CORDIC DDC FPGAs Filte SRC}, month = {July}, number = 1, pages = 6, timestamp = {2014-02-03T06:16:40.000+0100}, title = {FPGA Implementation of Optimized CIC Filter for Sample Rate Conversion in Software Radio Receiver}, url = {http://searchdl.org/public/journals/2013/IJRTET/9/1/522.pdf}, volume = 9, year = 2013 }