%0 Journal Article %1 journals/jssc/VenerusG15a %A Venerus, Christian %A Galton, Ian %D 2015 %J IEEE J. Solid State Circuits %K dblp %N 9 %P 2224 %T Errata for Ä TDC-Free Mostly-Digital FDC-PLL Frequency Synthesizer With a 2.8-3.5 GHz DCO". %U http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#VenerusG15a %V 50

@article{journals/jssc/VenerusG15a, added-at = {2020-08-30T00:00:00.000+0200}, author = {Venerus, Christian and Galton, Ian}, biburl = {https://www.bibsonomy.org/bibtex/2f4bd6d13fd751f3ac06ae24d479b6e58/dblp}, ee = {https://doi.org/10.1109/JSSC.2015.2465572}, interhash = {8aea26b0ec3c67586ce49521efe00aa2}, intrahash = {f4bd6d13fd751f3ac06ae24d479b6e58}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 9, pages = 2224, timestamp = {2020-08-31T11:41:17.000+0200}, title = {Errata for "A TDC-Free Mostly-Digital FDC-PLL Frequency Synthesizer With a 2.8-3.5 GHz DCO".}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc50.html#VenerusG15a}, volume = 50, year = 2015 }