Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes.
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%0 Conference Paper
%1 conf/vlsic/SongXYRFBZWNBNB16
%A Song, Seung Chul
%A Xu, J.
%A Yang, D.
%A Rim, K.
%A Feng, P.
%A Bao, Jerry
%A Zhu, J.
%A Wang, Joseph
%A Nallapati, G.
%A Badaroglu, Mustafa
%A Narayanasetti, P.
%A Bucki, B.
%A Fischer, Jeff
%A Yeap, Geoffrey
%B VLSI Circuits
%D 2016
%I IEEE
%K dblp
%P 1-2
%T Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes.
%U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#SongXYRFBZWNBNB16
%@ 978-1-5090-0635-9
@inproceedings{conf/vlsic/SongXYRFBZWNBNB16,
added-at = {2023-09-01T00:00:00.000+0200},
author = {Song, Seung Chul and Xu, J. and Yang, D. and Rim, K. and Feng, P. and Bao, Jerry and Zhu, J. and Wang, Joseph and Nallapati, G. and Badaroglu, Mustafa and Narayanasetti, P. and Bucki, B. and Fischer, Jeff and Yeap, Geoffrey},
biburl = {https://www.bibsonomy.org/bibtex/2ed8e01e48cfbb4db28b6f0f55f85e1d0/dblp},
booktitle = {VLSI Circuits},
crossref = {conf/vlsic/2016},
ee = {https://doi.org/10.1109/VLSIC.2016.7573515},
interhash = {8e893a06c39ae578d65ead470afbefaa},
intrahash = {ed8e01e48cfbb4db28b6f0f55f85e1d0},
isbn = {978-1-5090-0635-9},
keywords = {dblp},
pages = {1-2},
publisher = {IEEE},
timestamp = {2024-04-10T15:34:06.000+0200},
title = {Unified Technology Optimization Platform using Integrated Analysis (UTOPIA) for holistic technology, design and system co-optimization at <= 7nm nodes.},
url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#SongXYRFBZWNBNB16},
year = 2016
}