%0 Conference Paper %1 conf/cases/DavisBGSFRCUWT15 %A Davis, B. %A Baird, Ryan %A Gavin, Peter %A Själander, Magnus %A Finlayson, Ian %A Rasapour, F. %A Cook, G. %A Uh, Gang-Ryung %A Whalley, David B. %A Tyson, Gary S. %B CASES %D 2015 %E Iyer, Ravi %E Garg, Siddharth %I IEEE %K dblp %P 167-176 %T Scheduling instruction effects for a statically pipelined processor. %U http://dblp.uni-trier.de/db/conf/cases/cases2015.html#DavisBGSFRCUWT15 %@ 978-1-4673-8320-2

@inproceedings{conf/cases/DavisBGSFRCUWT15, added-at = {2016-10-28T00:00:00.000+0200}, author = {Davis, B. and Baird, Ryan and Gavin, Peter and Själander, Magnus and Finlayson, Ian and Rasapour, F. and Cook, G. and Uh, Gang-Ryung and Whalley, David B. and Tyson, Gary S.}, biburl = {https://www.bibsonomy.org/bibtex/26500e8527a0bfe34215be5fdd7648463/dblp}, booktitle = {CASES}, crossref = {conf/cases/2015}, editor = {Iyer, Ravi and Garg, Siddharth}, ee = {http://dl.acm.org/citation.cfm?id=2830710}, interhash = {92190fee73ac2a1c4bcb1c31d4da1f6f}, intrahash = {6500e8527a0bfe34215be5fdd7648463}, isbn = {978-1-4673-8320-2}, keywords = {dblp}, pages = {167-176}, publisher = {IEEE}, timestamp = {2016-10-29T11:35:43.000+0200}, title = {Scheduling instruction effects for a statically pipelined processor.}, url = {http://dblp.uni-trier.de/db/conf/cases/cases2015.html#DavisBGSFRCUWT15}, year = 2015 }