%0 Conference Paper %1 conf/dac/CiesielskiYBLR15 %A Ciesielski, Maciej J. %A Yu, Cunxi %A Brown, Walter %A Liu, Duo %A Rossi, André %B DAC %D 2015 %I ACM %K dblp %P 52:1-52:6 %T Verification of gate-level arithmetic circuits by function extraction. %U http://dblp.uni-trier.de/db/conf/dac/dac2015.html#CiesielskiYBLR15 %@ 978-1-4503-3520-1

@inproceedings{conf/dac/CiesielskiYBLR15, added-at = {2018-11-06T00:00:00.000+0100}, author = {Ciesielski, Maciej J. and Yu, Cunxi and Brown, Walter and Liu, Duo and Rossi, André}, biburl = {https://www.bibsonomy.org/bibtex/2edc48998b6526248f8aa653e71a0586b/dblp}, booktitle = {DAC}, crossref = {conf/dac/2015}, ee = {https://doi.org/10.1145/2744769.2744925}, interhash = {96493febce31c95733969dbb0862ae4f}, intrahash = {edc48998b6526248f8aa653e71a0586b}, isbn = {978-1-4503-3520-1}, keywords = {dblp}, pages = {52:1-52:6}, publisher = {ACM}, timestamp = {2018-11-07T15:14:15.000+0100}, title = {Verification of gate-level arithmetic circuits by function extraction.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2015.html#CiesielskiYBLR15}, year = 2015 }