%0 Conference Paper %1 conf/vlsid/JoshiHWSC00 %A Joshi, Rajiv V. %A Hwang, Wei %A Wilson, S. C. %A Shahidi, Ghavam V. %A Chuang, Ching-Te %B VLSI Design %D 2000 %I IEEE Computer Society %K dblp %P 44-49 %T A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, 0.25µm SOI Technology. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2000.html#JoshiHWSC00 %@ 0-7695-0487-6

@inproceedings{conf/vlsid/JoshiHWSC00, added-at = {2023-03-24T00:00:00.000+0100}, author = {Joshi, Rajiv V. and Hwang, Wei and Wilson, S. C. and Shahidi, Ghavam V. and Chuang, Ching-Te}, biburl = {https://www.bibsonomy.org/bibtex/2ad1468ddab918f4f86eba074ffa99290/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2000}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.2000.812583}, interhash = {98fe613f076cde7d37c1de980b01c4be}, intrahash = {ad1468ddab918f4f86eba074ffa99290}, isbn = {0-7695-0487-6}, keywords = {dblp}, pages = {44-49}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:01.000+0200}, title = {A Low Power 900 MHz Register File (8 Ports, 32 Words x 64 Bits) in 1.8V, 0.25µm SOI Technology.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2000.html#JoshiHWSC00}, year = 2000 }