%0 Conference Paper %1 conf/iscas/MadesSG02 %A Mades, Jochen %A Schwarz, D. E. %A Glesner, Manfred %B ISCAS (5) %D 2002 %I IEEE %K %P 477-480 %T A discrete algorithm for the regularization of hierarchical VHDL-AMS models. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2002-5.html#MadesSG02 %@ 0-7803-7448-7

@inproceedings{conf/iscas/MadesSG02, added-at = {2023-12-13T06:01:52.000+0100}, author = {Mades, Jochen and Schwarz, D. E. and Glesner, Manfred}, biburl = {https://www.bibsonomy.org/bibtex/21aadda71495862b6f1c9e9267c8f4b1e/admin}, booktitle = {ISCAS (5)}, crossref = {conf/iscas/2002}, ee = {http://dx.doi.org/10.1109/ISCAS.2002.1010744}, interhash = {a989262c3470782b26f56a5230beb29f}, intrahash = {1aadda71495862b6f1c9e9267c8f4b1e}, isbn = {0-7803-7448-7}, keywords = {}, pages = {477-480}, publisher = {IEEE}, timestamp = {2023-12-13T06:01:52.000+0100}, title = {A discrete algorithm for the regularization of hierarchical VHDL-AMS models.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2002-5.html#MadesSG02}, year = 2002 }