%0 Journal Article %1 journals/tvlsi/PakbazniaP12 %A Pakbaznia, Ehsan %A Pedram, Massoud %D 2012 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 2 %P 380-385 %T Design of a Tri-Modal Multi-Threshold CMOS Switch With Application to Data Retentive Power Gating. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi20.html#PakbazniaP12 %V 20

@article{journals/tvlsi/PakbazniaP12, added-at = {2020-03-11T00:00:00.000+0100}, author = {Pakbaznia, Ehsan and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/21369c25ed796b66d7d77c652fed4b3f0/dblp}, ee = {https://doi.org/10.1109/TVLSI.2010.2102054}, interhash = {d116a9ed145c38970247c5ed078c1bf6}, intrahash = {1369c25ed796b66d7d77c652fed4b3f0}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 2, pages = {380-385}, timestamp = {2020-03-12T11:42:36.000+0100}, title = {Design of a Tri-Modal Multi-Threshold CMOS Switch With Application to Data Retentive Power Gating.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi20.html#PakbazniaP12}, volume = 20, year = 2012 }