%0 Conference Paper %1 conf/isca/SonSRLA13 %A Son, Young Hoon %A O, Seongil %A Ro, Yuhwan %A Lee, Jae W. %A Ahn, Jung Ho %B ISCA %D 2013 %E Mendelson, Avi %I ACM %K dblp %P 380-391 %T Reducing memory access latency with asymmetric DRAM bank organizations. %U http://dblp.uni-trier.de/db/conf/isca/isca2013.html#SonSRLA13 %@ 978-1-4503-2079-5

@inproceedings{conf/isca/SonSRLA13, added-at = {2023-03-21T00:00:00.000+0100}, author = {Son, Young Hoon and O, Seongil and Ro, Yuhwan and Lee, Jae W. and Ahn, Jung Ho}, biburl = {https://www.bibsonomy.org/bibtex/281fe01c1405ac38bdded5d0debec7720/dblp}, booktitle = {ISCA}, crossref = {conf/isca/2013}, editor = {Mendelson, Avi}, ee = {https://doi.org/10.1145/2485922.2485955}, interhash = {d31576461ca8d7d822a8abe5925136fc}, intrahash = {81fe01c1405ac38bdded5d0debec7720}, isbn = {978-1-4503-2079-5}, keywords = {dblp}, pages = {380-391}, publisher = {ACM}, timestamp = {2024-04-10T01:41:57.000+0200}, title = {Reducing memory access latency with asymmetric DRAM bank organizations.}, url = {http://dblp.uni-trier.de/db/conf/isca/isca2013.html#SonSRLA13}, year = 2013 }