%0 Conference Paper %1 conf/fpga/DavisHLSCC16 %A Davis, James J. %A Hung, Eddie %A Levine, Joshua M. %A Stott, Edward A. %A Cheung, Peter Y. K. %A Constantinides, George A. %B FPGA %D 2016 %E Chen, Deming %E Greene, Jonathan W. %I ACM %K dblp %P 276 %T Knowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only). %U http://dblp.uni-trier.de/db/conf/fpga/fpga2016.html#DavisHLSCC16 %@ 978-1-4503-3856-1

@inproceedings{conf/fpga/DavisHLSCC16, added-at = {2020-04-19T00:00:00.000+0200}, author = {Davis, James J. and Hung, Eddie and Levine, Joshua M. and Stott, Edward A. and Cheung, Peter Y. K. and Constantinides, George A.}, biburl = {https://www.bibsonomy.org/bibtex/2f1ee3a49bd987d4db963033798486d7a/dblp}, booktitle = {FPGA}, crossref = {conf/fpga/2016}, editor = {Chen, Deming and Greene, Jonathan W.}, ee = {https://doi.org/10.1145/2847263.2847316}, interhash = {d5d80a5de7c1035f75139937b1bf90da}, intrahash = {f1ee3a49bd987d4db963033798486d7a}, isbn = {978-1-4503-3856-1}, keywords = {dblp}, pages = 276, publisher = {ACM}, timestamp = {2020-04-21T11:45:11.000+0200}, title = {Knowledge is Power: Module-level Sensing for Runtime Optimisation (Abstact Only).}, url = {http://dblp.uni-trier.de/db/conf/fpga/fpga2016.html#DavisHLSCC16}, year = 2016 }