%0 Journal Article %1 journals/vlsi/MehtaDD11 %A Mehta, Usha Sandeep %A Dasgupta, Kankar S. %A Devashrayee, Niranjan M. %D 2011 %J VLSI Design %K dblp %P 948926:1-948926:7 %T Suitability of Various Low-Power Testing Techniques for IP Core-Based SoC: A Survey. %U http://dblp.uni-trier.de/db/journals/vlsi/vlsi2011.html#MehtaDD11 %V 2011

@article{journals/vlsi/MehtaDD11, added-at = {2023-09-30T00:00:00.000+0200}, author = {Mehta, Usha Sandeep and Dasgupta, Kankar S. and Devashrayee, Niranjan M.}, biburl = {https://www.bibsonomy.org/bibtex/2ce1ed125147df8e48b4961651a1af63c/dblp}, ee = {https://www.wikidata.org/entity/Q58694568}, interhash = {e5b0ea01a0a11b96dc3c467e183ee34d}, intrahash = {ce1ed125147df8e48b4961651a1af63c}, journal = {VLSI Design}, keywords = {dblp}, pages = {948926:1-948926:7}, timestamp = {2024-04-08T12:07:49.000+0200}, title = {Suitability of Various Low-Power Testing Techniques for IP Core-Based SoC: A Survey.}, url = {http://dblp.uni-trier.de/db/journals/vlsi/vlsi2011.html#MehtaDD11}, volume = 2011, year = 2011 }