%0 Conference Paper %1 conf/vlsid/BhattacharjeeDSRC97 %A Bhattacharjee, Partha Sarathi %A Das, Sajal K. %A Saha, Debashis %A Roychowdhury, D. %A Chaudhuri, Parimal Pal %B VLSI Design %D 1997 %I IEEE Computer Society %K dblp %P 247-252 %T A Parallel Architecture for Video Compression. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid1997.html#BhattacharjeeDSRC97 %@ 0-8186-7755-4

@inproceedings{conf/vlsid/BhattacharjeeDSRC97, added-at = {2023-03-24T00:00:00.000+0100}, author = {Bhattacharjee, Partha Sarathi and Das, Sajal K. and Saha, Debashis and Roychowdhury, D. and Chaudhuri, Parimal Pal}, biburl = {https://www.bibsonomy.org/bibtex/240e9dc3cd85343a0fc7e2b2aaf824a1e/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/1997}, ee = {https://doi.ieeecomputersociety.org/10.1109/ICVD.1997.568084}, interhash = {fb4345a7fc29cb77809be2bcce8b5596}, intrahash = {40e9dc3cd85343a0fc7e2b2aaf824a1e}, isbn = {0-8186-7755-4}, keywords = {dblp}, pages = {247-252}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T05:47:27.000+0200}, title = {A Parallel Architecture for Video Compression.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid1997.html#BhattacharjeeDSRC97}, year = 1997 }