Inproceedings,
An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.
J. Ihm, S. Bae, K. Park, H. Song, W. Lee, H. Kim, K. Kim, H. Lee, M. Park, S. Bang, M. Lee, G. Moon, Y. Jang, S. Hwang, Y. Cho, S. Hwang, D. Kim, J. Lim, J. Kim, S. Park, O. Park, S. Yang, J. Choi, Y. Kim, H. Lee, S. Kim, S. Jang, Y. Jun, and S. Cho.ISSCC, page 492-617. IEEE, (2007)
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- conf/isscc/IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07
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- inproceedings
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- ISSCC
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- 2007
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- 492-617
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- IEEE
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- conf/isscc/2007
- ee
- https://doi.org/10.1109/ISSCC.2007.373509
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- 1-4244-0853-9
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- http://dblp.uni-trier.de/db/conf/isscc/isscc2007.html#IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07
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%1 conf/isscc/IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07
%A Ihm, Jeong-Don
%A Bae, Seung-Jun
%A Park, Kwang-Il
%A Song, Ho-Young
%A Lee, Woo-Jin
%A Kim, Hyun-Jin
%A Kim, Kyoung-Ho
%A Lee, Ho-Kyung
%A Park, Min-Sang
%A Bang, Sam-Young
%A Lee, Mi-Jin
%A Moon, Gil-Shin
%A Jang, Young-Wook
%A Hwang, Suk-Won
%A Cho, Young-Chul
%A Hwang, Sang-Jun
%A Kim, Dae-Hyun
%A Lim, Ji-Hoon
%A Kim, Jae-Sung
%A Park, Su-Jin
%A Park, Ok-Joo
%A Yang, Se-Mi
%A Choi, Jin-Yong
%A Kim, Young-Wook
%A Lee, Hyun-Kyu
%A Kim, Sunghoon
%A Jang, Seong-Jin
%A Jun, Young-Hyun
%A Cho, Soo-In
%B ISSCC
%D 2007
%I IEEE
%K dblp
%P 492-617
%T An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.
%U http://dblp.uni-trier.de/db/conf/isscc/isscc2007.html#IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07
%@ 1-4244-0853-9
@inproceedings{conf/isscc/IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07,
added-at = {2021-06-29T00:00:00.000+0200},
author = {Ihm, Jeong-Don and Bae, Seung-Jun and Park, Kwang-Il and Song, Ho-Young and Lee, Woo-Jin and Kim, Hyun-Jin and Kim, Kyoung-Ho and Lee, Ho-Kyung and Park, Min-Sang and Bang, Sam-Young and Lee, Mi-Jin and Moon, Gil-Shin and Jang, Young-Wook and Hwang, Suk-Won and Cho, Young-Chul and Hwang, Sang-Jun and Kim, Dae-Hyun and Lim, Ji-Hoon and Kim, Jae-Sung and Park, Su-Jin and Park, Ok-Joo and Yang, Se-Mi and Choi, Jin-Yong and Kim, Young-Wook and Lee, Hyun-Kyu and Kim, Sunghoon and Jang, Seong-Jin and Jun, Young-Hyun and Cho, Soo-In},
biburl = {https://www.bibsonomy.org/bibtex/2436f81681012df9e8349761e2b644e08/dblp},
booktitle = {ISSCC},
crossref = {conf/isscc/2007},
ee = {https://doi.org/10.1109/ISSCC.2007.373509},
interhash = {21f807342c6d8984bdfa85f273cbea32},
intrahash = {436f81681012df9e8349761e2b644e08},
isbn = {1-4244-0853-9},
keywords = {dblp},
pages = {492-617},
publisher = {IEEE},
timestamp = {2024-04-10T11:05:11.000+0200},
title = {An 80nm 4Gb/s/pin 32b 512Mb GDDR4 Graphics DRAM with Low-Power and Low-Noise Data-Bus Inversion.},
url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2007.html#IhmBPSLKKLPBLMJHCHKLKPPYCKLKJJC07},
year = 2007
}