In this paper we present a scalable hardware architecture to implement large-scale convolutional neural networks and state-of-the-art multi-layered artificial vision systems. This system is fully digital and is a modular vision engine with the goal of performing real-time detection, recognition and segmentation of mega-pixel images. We present a performance comparison between a software, FPGA and ASIC implementation that shows a speed up in custom hardware implementations.
%0 Conference Paper
%1 5537908
%A Farabet, C.
%A Martini, B.
%A Akselrod, P.
%A Talay, S.
%A LeCun, Y.
%A Culurciello, E.
%B Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
%D 2010
%K deep_learning fpga
%P 257-260
%R 10.1109/ISCAS.2010.5537908
%T Hardware accelerated convolutional neural networks for synthetic vision systems
%U http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5537908
%X In this paper we present a scalable hardware architecture to implement large-scale convolutional neural networks and state-of-the-art multi-layered artificial vision systems. This system is fully digital and is a modular vision engine with the goal of performing real-time detection, recognition and segmentation of mega-pixel images. We present a performance comparison between a software, FPGA and ASIC implementation that shows a speed up in custom hardware implementations.
@inproceedings{5537908,
abstract = {In this paper we present a scalable hardware architecture to implement large-scale convolutional neural networks and state-of-the-art multi-layered artificial vision systems. This system is fully digital and is a modular vision engine with the goal of performing real-time detection, recognition and segmentation of mega-pixel images. We present a performance comparison between a software, FPGA and ASIC implementation that shows a speed up in custom hardware implementations.},
added-at = {2016-03-25T18:59:19.000+0100},
author = {Farabet, C. and Martini, B. and Akselrod, P. and Talay, S. and LeCun, Y. and Culurciello, E.},
biburl = {https://www.bibsonomy.org/bibtex/23fc191ec744d09ad94f7575ba86973af/dallmann},
booktitle = {Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on},
doi = {10.1109/ISCAS.2010.5537908},
interhash = {c65e5b988537cb39e223a65c0d78a0ff},
intrahash = {3fc191ec744d09ad94f7575ba86973af},
keywords = {deep_learning fpga},
month = may,
pages = {257-260},
timestamp = {2016-03-25T18:59:19.000+0100},
title = {Hardware accelerated convolutional neural networks for synthetic vision systems},
url = {http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=5537908},
year = 2010
}