%0 Conference Paper %1 conf/sbac-pad/ZhuoP05 %A Zhuo, Ling %A Prasanna, Viktor K. %B SBAC-PAD %D 2005 %I IEEE Computer Society %K dblp %P 52-59 %T High-Performance and Area-Efficient Reduction Circuits on FPGAs. %U http://dblp.uni-trier.de/db/conf/sbac-pad/sbac-pad2005.html#ZhuoP05 %@ 0-7695-2446-X

@inproceedings{conf/sbac-pad/ZhuoP05, added-at = {2023-03-23T00:00:00.000+0100}, author = {Zhuo, Ling and Prasanna, Viktor K.}, biburl = {https://www.bibsonomy.org/bibtex/24f96d5ab132d3d94b0178692b92aef69/dblp}, booktitle = {SBAC-PAD}, crossref = {conf/sbac-pad/2005}, ee = {https://doi.ieeecomputersociety.org/10.1109/CAHPC.2005.28}, interhash = {d6d529a2bc85c91d4b8e2eb38cb822be}, intrahash = {4f96d5ab132d3d94b0178692b92aef69}, isbn = {0-7695-2446-X}, keywords = {dblp}, pages = {52-59}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T17:36:05.000+0200}, title = {High-Performance and Area-Efficient Reduction Circuits on FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/sbac-pad/sbac-pad2005.html#ZhuoP05}, year = 2005 }