%0 Conference Paper %1 conf/vlsid/FujiwaraOINKY09 %A Fujiwara, Hidehiro %A Okumura, Shunsuke %A Iguchi, Yusuke %A Noguchi, Hiroki %A Kawaguchi, Hiroshi %A Yoshimoto, Masahiko %B VLSI Design %D 2009 %I IEEE Computer Society %K dblp %P 295-300 %T A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#FujiwaraOINKY09 %@ 978-0-7695-3506-7

@inproceedings{conf/vlsid/FujiwaraOINKY09, added-at = {2024-03-11T00:00:00.000+0100}, author = {Fujiwara, Hidehiro and Okumura, Shunsuke and Iguchi, Yusuke and Noguchi, Hiroki and Kawaguchi, Hiroshi and Yoshimoto, Masahiko}, biburl = {https://www.bibsonomy.org/bibtex/269fe65fce83cf56e671cd17635c10240/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2009}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2009.54}, interhash = {10affa43abff05b9dc021d5df1760e22}, intrahash = {69fe65fce83cf56e671cd17635c10240}, isbn = {978-0-7695-3506-7}, keywords = {dblp}, pages = {295-300}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:34.000+0200}, title = {A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#FujiwaraOINKY09}, year = 2009 }