%0 Conference Paper %1 conf/uksim/SharmaSNBV09 %A Sharma, Rohit %A Sehgal, Vivek Kumar %A Nitin, %A Bhasker, Pranav %A Verma, Ishita %B UKSim %D 2009 %E Al-Dabass, David %I IEEE Computer Society %K dblp %P 568-573 %T Design and Implementation of a 64-bit RISC Processor Using VHDL. %U http://dblp.uni-trier.de/db/conf/uksim/uksim2009.html#SharmaSNBV09 %@ 978-0-7695-3593-7

@inproceedings{conf/uksim/SharmaSNBV09, added-at = {2023-09-30T00:00:00.000+0200}, author = {Sharma, Rohit and Sehgal, Vivek Kumar and Nitin and Bhasker, Pranav and Verma, Ishita}, biburl = {https://www.bibsonomy.org/bibtex/26c743deb2782cdace08416b9807969d4/dblp}, booktitle = {UKSim}, crossref = {conf/uksim/2009}, editor = {Al-Dabass, David}, ee = {https://doi.ieeecomputersociety.org/10.1109/UKSIM.2009.30}, interhash = {7a03d22a22fe7505f6f4e9b219eca013}, intrahash = {6c743deb2782cdace08416b9807969d4}, isbn = {978-0-7695-3593-7}, keywords = {dblp}, pages = {568-573}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T11:35:13.000+0200}, title = {Design and Implementation of a 64-bit RISC Processor Using VHDL.}, url = {http://dblp.uni-trier.de/db/conf/uksim/uksim2009.html#SharmaSNBV09}, year = 2009 }