%0 Conference Paper %1 conf/dac/HuangFYZZL16 %A Huang, Qicheng %A Fang, Chenlei %A Yang, Fan %A Zeng, Xuan %A Zhou, Dian %A Li, Xin %B DAC %D 2016 %I ACM %K dblp %P 8:1-8:6 %T Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits. %U http://dblp.uni-trier.de/db/conf/dac/dac2016.html#HuangFYZZL16 %@ 978-1-4503-4236-0

@inproceedings{conf/dac/HuangFYZZL16, added-at = {2019-07-26T00:00:00.000+0200}, author = {Huang, Qicheng and Fang, Chenlei and Yang, Fan and Zeng, Xuan and Zhou, Dian and Li, Xin}, biburl = {https://www.bibsonomy.org/bibtex/276a28e71f085b49a475e8774319544b3/dblp}, booktitle = {DAC}, crossref = {conf/dac/2016}, ee = {https://doi.org/10.1145/2897937.2898014}, interhash = {737b4e15702242fc9a8bf432b4886915}, intrahash = {76a28e71f085b49a475e8774319544b3}, isbn = {978-1-4503-4236-0}, keywords = {dblp}, pages = {8:1-8:6}, publisher = {ACM}, timestamp = {2019-07-27T11:40:05.000+0200}, title = {Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2016.html#HuangFYZZL16}, year = 2016 }